Phase Change Film Multi-Layer Structure for High Integration

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Solution Overview

Problem

The challenge lies in forming fine patterns of phase change films, such as chalcogenide semiconductor membranes, which are difficult due to their exotic nature, limiting high integration and usage as memory elements or wiring due to high specific resistance and difficulties in applying existing photolithography and etching technologies.

Innovation Solution

A semiconductor device with a multi-layer structure comprising a phase change film that can reversibly switch between amorphous and crystalline states, combined with an electric conduction film of lower specific resistance, functioning as a wiring layer extending parallel to the semiconductor substrate, facilitating easy formation and high integration of phase change films.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If phase change films are formed in fine patterns comparable to bit line width and source/drain active region width, then high integration is achieved, but manufacturing difficulty increases due to inability to apply existing photolithography and etching technologies

Engineering Contradiction:
Improveintegration densityVSAvoidmanufacturing difficulty
Core Design Contradiction:
Area of moving objectVSEase of manufacture

Solution Approach 1:

The patent transitions from planar fine-pattern formation to three-dimensional pillar structure formation. Instead of attempting to pattern phase change films directly in fine two-dimensional patterns using conventional photolithography, the invention forms vertical pillars through selective epitaxial growth, using the third dimension (height) to achieve the desired integration density while avoiding the limitations of conventional lateral patterning methods.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent changes the formation method parameters from conventional photolithography and etching to selective epitaxial growth. By changing the fundamental manufacturing parameter from top-down patterning to bottom-up self-organized growth, the invention enables formation of high-aspect-ratio pillar structures with precise dimensional control that are incompatible with conventional fine-pattern processing of phase change materials.

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If phase change films are used as memory elements in large area formations, then manufacturing is simplified, but high integration is restricted

Engineering Contradiction:
Improveformation simplicityVSAvoidintegration density
Core Design Contradiction:
Ease of manufactureVSArea of moving object

Solution Approach 1:

The patent resolves this contradiction by moving from two-dimensional large-area film formation to three-dimensional pillar structures. The selective epitaxial growth process maintains the simplicity of large-area formation (applying film over entire substrate) while achieving high integration through vertical dimension exploitation, creating high-aspect-ratio pillars that provide both manufacturing simplicity and high density.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Adaptability or versatility

If phase change films are used as wiring, then layer integration is achieved, but current conduction is insufficient due to high specific resistance compared to metals

Engineering Contradiction:
Improveusage flexibilityVSAvoidelectrical conduction
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies local quality by using phase change materials selectively in specific locations and functions rather than universally. Phase change films are used locally as memory elements (where resistance switching is desired) while metal wiring is used for current conduction paths. The multi-layer structure allows phase change pillars to be positioned at specific locations for memory functionality while maintaining separate metal interconnect layers for efficient current transport.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enables the easy formation and high integration of phase change films, reducing the complexity of manufacturing and eliminating the need for via holes, thereby reducing mask costs and improving output throughput while preventing cell area increases.

Implementation Method 1

The phase change film can take reversibly the stable two phase of the amorphous (amorphous) state of high resistance, and a crystalline substance (crystalline) state of low resistance according to the heat application based on a current pulse.

Methodology Applied
Scientific EffectPhase change: Phase Change

Data Source

PatentUS8232543B2Semiconductor device and method of manufacturing the same
Publication Date: 2012.07.31 RENESAS ELECTRONICS CORP
  • US8232543B2 patent drawing
  • US8232543B2 patent drawing
  • US8232543B2 patent drawing

AI summary

A semiconductor device and a method of manufacturing the same with easy formation of a phase change film is realized, realizing high integration at the time of using a phase change film as a memory element.Between MISFET of the region which forms one memory cell, and MISFET which adjoined it, each source of MISFET adjoins in the front surface of a semiconductor substrate, insulating. And the multi-layer structure of a phase change film, and the electric conduction film of specific resistance lower than the specific resistance is formed in the plan view of the front surface of a semiconductor substrate ranging over each source of both MISFET, and a plug and a plug stacked on it. The multi-layer structure functions as a wiring extending and existing in parallel on the surface of a semiconductor substrate, and an electric conduction film sends the current of a parallel direction on the surface of a semiconductor substrate.