Phase-Change Layer Void-Free Burial in Narrow Memory Regions

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Solution Overview

Problem

As integration density in variable resistive memory devices increases, there is a need for a method to bury phase-change material in narrow phase-change regions without voids, which existing techniques struggle to achieve effectively.

Innovation Solution

A method involving the formation of a crystalline first phase-change layer and a subsequent amorphous second phase-change layer, grown based on the crystallinity of the first layer, to fill the phase-change region without voids, using techniques like CVD or ALD, and subsequent planarization to form a resistive layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the diameter of the phase-change region is reduced to increase integration density, then integration density is improved, but it becomes difficult to bury the phase-change material layer without voids

Engineering Contradiction:
Improveintegration densityVSAvoidvoid-free burial of phase-change material
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The phase-change material layer is divided into two separate layers: a first phase-change material layer and a second phase-change material layer. This segmentation allows each layer to serve a specific function - the first layer provides crystalline structure while the second layer fills gaps, collectively achieving void-free burial in narrow phase-change regions

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention changes the physical state parameters of the phase-change material layers by controlling their crystallinity. The first layer is formed in a crystalline state to provide structural foundation, while the second layer is formed in an amorphous state to efficiently fill gaps, optimizing the burial process for narrow regions

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If conventional methods are used to form phase-change material layer in narrow regions, then process simplicity is maintained, but voids occur in the phase-change region

Engineering Contradiction:
Improveprocess simplicityVSAvoidvoid-free phase-change region
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The first phase-change material layer is formed in advance with a crystalline structure that serves as a template and foundation. This preliminary action creates a structured base that guides the subsequent formation of the second layer, ensuring complete and void-free filling of the phase-change region

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention uses a composite structure of two phase-change material layers with different physical states (crystalline and amorphous). This composite approach combines the advantages of both states - the structural integrity of crystalline material and the gap-filling capability of amorphous material - to achieve reliable void-free burial

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach ensures dense burial of the phase-change material in the phase-change region with superior gap-fill properties, reducing the risk of voids and allowing for higher integration density without the need for high-temperature heat treatment, thus enhancing the performance of semiconductor integrated circuits.

Implementation Method 1

growing a second phase-change layer on the first phase-change layer based on the crystallinity of the first phase-change layer

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Implementation Method 2

forming a first phase-change layer having a crystalline state

Methodology Applied
Scientific EffectCrystallization: Crystallisation

Data Source

PatentUS9419221B2Method of fabricating semiconductor integrated circuit having phase-change layer
Publication Date: 2016.08.16 MIMIRIP LLC
  • US9419221B2 patent drawing
  • US9419221B2 patent drawing
  • US9419221B2 patent drawing

AI summary

A method of fabricating a semiconductor integrated circuit that includes forming a lower electrode in a semiconductor substrate, forming an interlayer insulating layer including a phase-change region exposing the lower electrode on the semiconductor substrate, forming a first phase-change layer having a crystalline state along surfaces of the interlayer insulating layer and an exposed lower electrode, and growing a second phase-change layer on the first phase-change layer based on the crystallinity of the first phase-change layer to be filled in the phase-change region.