Phase Change Memory Reading Circuit with Dynamic Shift Current

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Solution Overview

Problem

Phase change memory devices face data retention issues due to temperature-induced phase variations, leading to reduced current differences between set and reset states, making it difficult to accurately read data without complex and costly refresh operations or fixed reference currents, especially at high temperatures.

Innovation Solution

A reading circuit and method that involves precharging a bit line, activating a shift current based on the stored data to charge or discharge the line, and then comparing the voltage with a reference voltage using a comparator stage, allowing for discrimination between set and reset states by translating the current distributions to facilitate zero or low current detection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If phase change memory devices are used for data storage, then non-volatile storage capability is achieved, but data retention is compromised at high temperatures due to phase variations

Engineering Contradiction:
Improvedata retentionVSAvoidoperating temperature stability
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting the reference current based on temperature conditions. The reading circuit modifies the reference current parameter to compensate for temperature-induced phase variations in the storage element, thereby maintaining reliable data retention across different temperature ranges without requiring complex refresh operations

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements feedback mechanisms where the reading circuit continuously monitors the current state of the storage element and adjusts the reference current accordingly. This feedback loop enables the system to detect phase variations caused by temperature changes and correct for them, ensuring stable data retention at high temperatures

Inventive Principle:
Principle #23Feedback

2Ease of operation

If fixed reference currents are used for reading, then reading operation is simplified, but reading accuracy deteriorates at high temperatures due to reduced current differences between set and reset states

Engineering Contradiction:
Improvereading operation simplicityVSAvoidreading accuracy
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent transitions from static fixed reference currents to dynamic adjustable reference currents. The reference current is dynamically adapted based on temperature conditions and the detected state of the storage element, allowing the reading circuit to maintain high accuracy across varying temperatures while preserving operational simplicity through automated adjustment

Inventive Principle:
Principle #15Dynamics

3Reliability

If complex refresh operations are implemented to maintain data retention, then data accuracy is improved, but device complexity and cost increase

Engineering Contradiction:
Improvedata accuracyVSAvoidrefresh operation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the temperature compensation function from complex refresh operations and integrates it into the reading circuit itself. By taking out the reference current adjustment mechanism and embedding it in the reading path, the system achieves data accuracy maintenance without requiring separate complex refresh operations, thereby reducing overall device complexity

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The reading circuit performs self-adjustment by automatically modifying the reference current based on detected phase variations. This self-service capability eliminates the need for external complex refresh operations, as the reading circuit itself compensates for temperature-induced errors, simplifying the overall system architecture

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances reading performance by increasing speed, reducing device size, and eliminating the need for reference structures, achieving a stable reading margin even at high temperatures, thus improving data retention and reducing errors.

Implementation Method 1

phase transition in the storage element is activated in temperature and is obtained by applying a current pulse having a duration of a few microseconds, which, by the Joule effect, locally raises the temperature and modifies the physical structure of the material

Methodology Applied
Scientific EffectJoule heating: Joule Heating

Implementation Method 2

the storage element is formed by a region of a material that, when subjected to adequate current values, is able to change its own physical structure, passing from an amorphous phase to a crystalline phase and vice versa

Methodology Applied
Scientific EffectPhase change: Phase Change

Data Source

PatentEP3564957B1Non-volatile memory device, in particular phase change memory, and reading method
Publication Date: 2021.02.24 STMICROELECTRONICS SRL
  • EP3564957B1 patent drawingFigure 1
  • EP3564957B1 patent drawingFigure 2A~3
  • EP3564957B1 patent drawingFigure 4~5

AI summary

The non-volatile memory device (30) has a circuit branch (31) associated to a bit line (LB, MBL) connected to a memory cell (32). When the memory cell is read, in a precharging step, the bit line is precharged. In a characteristic shift step, the memory cell is activated, and a current source (48) is activated to supply a shift current (Iadd) to the first bit line and cause the bit line to charge or discharge on the basis of the datum stored in the memory cell. In a detection step, the current source (48) is deactivated, the memory cell (32) is decoupled, and the bit line is coupled to an input of a comparator stage (50) that compares the voltage on the bit line with a reference voltage (Vref) to supply an output signal indicating a datum stored in the memory cell (32).