Multi-level Phase Change Memory Stack for High Density Storage
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Solution Overview
Problem
Current data storage technologies, such as phase change memory and microdot memories, face limitations in increasing storage capacity beyond surface integration density and require precise positioning, which can be costly and impractical for high-capacity applications.
Innovation Solution
A multi-level data memorization device using a stack of layers with phase change material between dielectric layers and conducting columns, allowing for three-dimensional integration and increased storage capacity without relying solely on surface area, with features like cylindrical contact zones and diodes for efficient data access and redundancy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If phase change memory or microdot memory is used to increase storage capacity, then surface integration density increases, but the device volume remains large and positioning precision requirements increase
Solution Approach 1:
The patent transitions from two-dimensional surface integration to three-dimensional vertical stacking by placing multiple memory layers (at least three) between substrate and cover, with each layer separated by dielectric layers. This multi-level architecture enables storage capacity expansion along the vertical dimension rather than requiring increased surface area, directly resolving the contradiction between storage capacity and device volume.
2Quantity of substance
If surface integration density increases to boost storage capacity, then more storage elements fit on surface, but manufacturing precision and positioning requirements increase
Solution Approach 1:
By stacking memory layers vertically rather than packing storage elements densely on a two-dimensional surface, the patent avoids the need for increasingly precise positioning and manufacturing as storage capacity scales. The vertical architecture allows standard manufacturing processes to be applied to each layer without requiring proportionally higher precision.
Solution Approach 2:
The patent divides the storage system into multiple independent memory layers separated by dielectric layers, with each layer containing storage elements that can be manufactured and processed independently. This segmentation allows standard manufacturing precision to be maintained across layers while achieving high overall storage capacity through vertical integration.
3Loss of time
If access bus is designed to minimize electromagnetic couplings for high frequency operation, then access time decreases, but device complexity increases
Solution Approach 1:
The patent replaces complex electromagnetic bus design with a simpler vertical stacking architecture where memory layers are directly accessible through the stack. This structural approach eliminates the need for complex access bus routing and electromagnetic coupling minimization, reducing device complexity while maintaining fast access times through direct vertical pathways.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables large, low-cost storage capacities in a small volume, with improved data access times and the ability to maintain functionality even if some memory layers become defective, through efficient current density and phase change mechanisms.
Implementation Method 1
The change from one phase to another, in other words from the crystalline state to the amorphous state or vice versa, is obtained by Joule heating, by means of a current pulse of variable magnitude.
Implementation Method 2
operation is based on a modification of the crystallinity state of a volume of the phase change material
Data Source
AI summary
A data memorization device including at least: a stack of layers including at least one memory layer based on a phase change material arranged between at least two insulating layers, placed on a substrate, a plurality of columns arranged in the stack of layers, and passing through each layer of the stack, each of the columns being based on at least one electrically conducting material, and a plurality of memorization elements formed by annular portions of the at least one memory layer surrounding columns.