Successive Program Control Circuit for Phase Change Memory
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Solution Overview
Problem
Conventional phase change memory apparatuses face inefficiencies in program operations due to the need for repeated reception of program commands and data, which prolongs the overall program time, especially when performing successive programming of data.
Innovation Solution
A semiconductor memory apparatus with a successive program control circuit that generates a programming enable signal based on received program addresses and data count signals, allowing for buffered program operations and simultaneous recording of multiple data sets without repeated command and data input, utilizing a program pulse generation block to generate write control signals and a write driver to program data in response.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional phase change memory apparatuses perform program operations by repeatedly receiving program commands and data, then program operations can be executed, but the overall program time is prolonged
Solution Approach 1:
The patent applies preliminary action by buffering program commands and data before execution. The successive program control circuit receives and stores program commands and data in advance, then executes them in a streamlined manner without repeated external reception, thereby reducing total program time while maintaining operational correctness
Solution Approach 2:
The patent implements continuity of useful action through successive program operations where multiple data sets are programmed sequentially without interruption or repeated command reception. The control circuit maintains continuous operation by automatically generating programming enable signals based on buffered data, eliminating idle waiting periods between operations
2Quantity of substance
If successive programming of multiple data sets is performed, then data recording capacity increases, but program operation complexity increases
Solution Approach 1:
The successive program control circuit applies self-service by automatically managing the programming process for multiple data sets. The circuit self-generates programming enable signals based on received program addresses and data count signals, eliminating the need for external intervention or complex control logic, thus managing high data capacity with simplified operation
Solution Approach 2:
The control circuit achieves universality by handling multiple programming operations through a single integrated mechanism. The same control logic manages successive programming of different data sets, program addresses, and data counts, allowing the system to scale data recording capacity without proportionally increasing operational complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient successive program operations, reducing overall program time and improving performance by allowing simultaneous recording of data, thereby enhancing the efficiency of program operations in phase change memory apparatuses.
Implementation Method 1
Joule's heat may be electrically generated by current flow through a conductor or a semiconductor to convert the GST between the amorphous state and the crystalline state
Implementation Method 2
A phase change substance may be converted into an amorphous state or a crystalline state depending upon a temperature condition
Implementation Method 3
if the GST is maintained at a crystallization temperature for a preselected time (several hundreds ns to several microseconds [μs]) and is then cooled, the GST is converted into the crystalline state
Data Source
AI summary
A semiconductor memory apparatus includes a program pulse generation block configured to generate write control signals and a program completion signal in response to a programming enable signal; a successive program control circuit configured to generate a successive programming enable signal in response to received program addresses and data count signals as a buffered program command or a buffered overwrite command; and a controller configured to generate the programming enable signal in response to the successive programming enable signal.