Phase Correction Circuit Using Delayed Flip-Flops for Wide-Range Metering

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Solution Overview

Problem

Conventional phase correction methods in electric energy metering devices face challenges in achieving both high precision and a wide phase correction range, with existing methods either limited by sampling frequency or down-sampling rate.

Innovation Solution

A phase correction circuit is designed with a reference voltage circuit and a current correction circuit, utilizing multiple D flip-flops and a data selector to adjust phase, where the number of delay D flip-flops in the current correction circuit is greater than or equal to those in the reference voltage circuit, allowing for high precision and extended phase correction range.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a D flip-flop is additionally provided between an ADC and a cascaded integrator-comb filter to extend phase correction range, then phase correction range is extended, but phase correction precision is limited by ADC sampling frequency

Engineering Contradiction:
Improvephase correction rangeVSAvoidphase correction precision
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent divides the phase correction function into two separate circuits: a reference voltage circuit with first delay D flip-flops for coarse phase correction, and a current correction circuit with second delay D flip-flops and data selector for fine phase correction. This segmentation allows each circuit to optimize for its specific function, resolving the contradiction between range and precision.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a data selector as an intermediary component in the current correction circuit that selects between multiple delayed current signals. This intermediary enables precise phase adjustment by choosing the optimal delayed signal, achieving high precision while maintaining wide correction range through the hierarchical structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If a D flip-flop is additionally provided between an integrator and a comb filter in each cascaded integrator-comb filter to improve phase correction precision, then phase correction precision is improved, but phase correction range becomes narrow when down-sampling rate is low

Engineering Contradiction:
Improvephase correction precisionVSAvoidphase correction range
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The patent segments the phase correction system into reference voltage circuit and current correction circuit, each with different numbers of delay D flip-flops. The reference voltage circuit provides a stable reference with fewer delay elements, while the current correction circuit uses more delay elements (second predetermined number ≥ first predetermined number) to achieve both precision and wide range.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent makes the phase correction system dynamic by using a data selector that can dynamically choose between multiple delayed current signals based on the required correction amount. This dynamic selection capability allows the system to adapt to different phase correction needs, achieving both precision and wide range.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10903825B1Phase correction circuit, phase correction method and electric energy metering device
Publication Date: 2021.01.26 HANGZHOU VANGO TECH
  • US10903825B1 patent drawing
  • US10903825B1 patent drawing
  • US10903825B1 patent drawing

AI summary

A phase correction circuit, a phase correction method and an electric energy metering device are provided. The phase correction circuit includes a reference voltage circuit and a current correction circuit. The reference voltage circuit includes a first predetermined number of first delay D flip-flops and a first synchronization D flip-flop. The current correction circuit includes a second predetermined number of second delay D flip-flops, a second synchronization D flip-flop and a data selector. The data selector outputs a current signal of one of the second delay D flip-flops to the second synchronization D flip-flop. The second predetermined number is greater than or equal to the first predetermined number. In a case that the second predetermined number is equal to the first predetermined number, each of the second predetermined number and the first predetermined number is greater than 1.