Phase Detection Circuit for Stable Pulse-Edge Clock Recovery
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing clock data recovery (CDR) technologies face challenges in achieving stable phase detection gain when the clock phase is tuned to a pulse response edge.
Innovation Solution
A phase detection method that extracts clock phase information based on a received signal, decision results, and response amplitude parameters, determining output clock phase information using at least three decision results and clock phase information in multiple symbol periods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If existing CDR technologies are used, then clock phase can be tuned to pulse response edge, but stable phase detection gain cannot be achieved
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing amplitude compensation values in a lookup table before phase detection. The amplitude compensation value corresponding to the current amplitude parameter is retrieved and applied during phase detection, eliminating the need for real-time complex calculations and ensuring stable phase detection gain when clock phase is tuned to pulse response edge.
Solution Approach 2:
The patent changes the parameter representation by introducing amplitude compensation values that adjust the phase detection process based on the amplitude parameter. By modifying the effective amplitude parameter through compensation values, the system achieves stable phase detection gain across different operating conditions, particularly when clock phase aligns with pulse response edge.
2Ease of manufacture
If conventional phase detection methods are used, then implementation is simple, but phase detection gain varies when clock phase aligns with pulse response edge
Solution Approach 1:
The patent implements preliminary action by pre-computing amplitude compensation values and storing them in a lookup table during system design or initialization. This allows the runtime system to simply retrieve and apply the appropriate compensation value based on the current amplitude parameter, maintaining implementation simplicity while achieving stable phase detection gain.
Solution Approach 2:
The patent introduces an intermediary element - the amplitude compensation value - that mediates between the raw amplitude parameter and the phase detection process. This intermediary compensates for amplitude variations, allowing the simple lookup table approach to achieve precision that would otherwise require complex real-time calculations.
Data Source
Figure 1
Figure 2
Figure 3(a)~3(d)
AI summary
Embodiments of this application disclose a phase detection method, a phase detection circuit, and a clock recovery apparatus. The method includes: receiving a first signal, and deciding a (2M-1) level of the first signal to obtain a decision result, where the first signal is a (2M-1)-level signal, and M is a positive integer; obtaining a response amplitude parameter of a transmission channel; extracting clock phase information in the first signal based on the first signal, the decision result, and the response amplitude parameter; and determining output clock phase information based on at least three decision results and at least three pieces of clock phase information in at least three symbol periods. According to the foregoing method, a stable phase detection gain can be achieved when a clock phase is tuned to a pulse response edge.