Phase Detector Equalizer Layout for Voltage-Balanced Sensing

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Solution Overview

Problem

Existing electronic devices with phase detectors face imbalances that affect their functionality due to unequal voltages at output terminals, caused by different loadings from parasitic capacitors and resistors, leading to inefficiencies in phase adjustment and synchronization.

Innovation Solution

The phase detector design includes a first transistor, a second transistor, a third transistor, a fourth transistor, and a first equalizer device, with additional equalizer devices connected in parallel at specific layout locations, utilizing p-type and n-type transistors to equalize voltages during an equalization period, ensuring balanced voltages before sensing, and disconnecting during sensing to accurately determine phase differences and control the delay line.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional phase detector is used without equalizer devices, then the device complexity is low, but voltage imbalances occur at output terminals due to different loadings from parasitic capacitors and resistors

Engineering Contradiction:
Improvevoltage balanceVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

An equalizer device is introduced as an intermediary component between the first and second output terminals. This equalizer includes a transistor that equalizes the voltages at these terminals during an equalization period, compensating for the voltage imbalances caused by different loadings from parasitic capacitors and resistors without requiring a complete redesign of the phase detector architecture

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The equalizer device operates periodically by enabling the transistor during specific equalization periods and disabling it during sensing periods. This periodic operation allows voltage equalization to occur at predetermined times, ensuring accurate phase detection while maintaining voltage balance across different loading conditions

Inventive Principle:
Principle #19Periodic action

2Reliability

If the transistor in the equalizer device is kept on continuously, then voltage equalization is maintained, but the ability to accurately sense phase differences is degraded

Engineering Contradiction:
Improvevoltage equalizationVSAvoidphase detection accuracy
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The transistor in the equalizer device is controlled to operate periodically rather than continuously. It is enabled during equalization periods to equalize voltages at the output terminals, and disabled during sensing periods to allow accurate phase detection. This periodic switching resolves the conflict between maintaining voltage equalization and achieving precise phase measurement

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

Voltage equalization is performed in advance during equalization periods before the sensing periods begin. By pre-equalizing the voltages at the output terminals, the system ensures that when sensing occurs, the voltages are already balanced, eliminating the need for continuous equalization and enabling accurate phase detection

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12000890B2Electronic device and phase detector
Publication Date: 2024.06.04 NAN YA TECH
  • US12000890B2 patent drawing
  • US12000890B2 patent drawing
  • US12000890B2 patent drawing

AI summary

An electronic device including a phase detector is provided. The phase detector includes a first transistor, a second transistor, a third transistor, a fourth transistor, and a first equalizer device. The first transistor has a first input terminal configured to receive a first signal. The second transistor has a second input terminal configured to receive a second signal. The third transistor is electrically connected to the first transistor and has a first output terminal. The fourth transistor is electrically connected to the second transistor and has a second output terminal. The first equalizer device is connected between the first output terminal and the second input terminal.