Phase Interpolator INL Calibration Using Reference Delay Matching
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Solution Overview
Problem
Conventional approaches to mitigate integral non-linearity (INL) in phase interpolators (PIs) are ineffective over different process, voltage, and temperature (PVT) conditions, leading to excessive power consumption and large transistor sizes, and fail to compensate for input signal amplitude variations and rise/fall time changes.
Innovation Solution
A method and circuit for detecting and calibrating INL in PIs, which involves determining the phase of an output signal, adjusting a reference signal's delay to match the output signal's phase, and measuring the delay in steps to determine and correct for INL, thereby reducing power consumption and circuit size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional approaches are used to mitigate INL in phase interpolators, then INL compensation is achieved, but power consumption increases and transistor size becomes large
Solution Approach 1:
The system performs self-calibration by automatically detecting INL errors through phase comparison and adjusting the reference signal delay without external intervention. The control logic continuously monitors phase differences and autonomously modifies delay settings to compensate for INL, eliminating the need for complex external calibration equipment and reducing overall system power consumption.
Solution Approach 2:
The system performs preliminary INL characterization during manufacturing or initial setup by measuring phase differences across various operating conditions. These measurements are stored as calibration data that is later applied during operation to pre-compensate for INL effects, avoiding the need for continuous real-time compensation and reducing operational power consumption.
2Reliability
If conventional approaches are used to mitigate INL in phase interpolators, then INL compensation is achieved, but transistor size becomes large
Solution Approach 1:
The patent extracts the INL compensation function from the main phase interpolator circuit by implementing a separate calibration subsystem. This subsystem includes a phase detector, control logic, and delay adjustment mechanism that operate independently to characterize and compensate for INL errors, allowing the main PI circuit to remain compact while achieving accurate compensation.
Solution Approach 2:
The patent introduces an intermediary calibration subsystem that mediates between the phase interpolator and the output. This intermediary layer includes a phase detector that measures actual phase differences and a control logic that translates these measurements into delay adjustments, effectively decoupling the compensation mechanism from the main signal path and reducing the size requirements of the primary PI circuit.
3Reliability
If conventional approaches are used to mitigate INL in phase interpolators, then INL compensation is achieved, but the system fails to adapt to PVT variations and signal amplitude changes
Solution Approach 1:
The system implements dynamic calibration by continuously or periodically measuring phase differences and adjusting the reference signal delay in real-time based on actual operating conditions. The control logic responds to PVT variations and signal amplitude changes by modifying delay settings adaptively, ensuring accurate INL compensation across varying environmental and operational conditions rather than relying on fixed compensation parameters.
Data Source
AI summary
An apparatus includes control logic coupled to a phase detector circuit and an adjustable delay circuit. The control logic is configured to obtain a state of a first phase of an output signal of a phase interpolator relative to a second phase of a reference signal, and adjust a delay of the reference signal until the second phase matches the first phase. The control logic is further configured to measure a total delay of the reference signal when the second phase matches the first phase, and determine integral non-linearity of the phase interpolator at the first code based on the total delay. The control logic may further calibrate a first code of a phase interpolator based, at least in part, on the integral non-linearity.