Phase-Switched Analog Circuits for Transistor Mismatch Reduction
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Solution Overview
Problem
Random offsets caused by transistor random mismatch in analog circuits such as operational amplifiers, comparators, and converters significantly impact circuit performance, and existing methods like auto zero are limited in application and speed.
Innovation Solution
A system and method using a digital means with a phase controller and switches to alternate input and output connections between pairs of matching transistors during even and odd phases, allowing for averaging of digital codes to reduce random offsets, applicable to circuits like DACs, ADCs, and comparators.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If auto zero method is used to reduce random offsets, then offset reduction is achieved, but circuit speed is limited due to required equilibration phase
Solution Approach 1:
The patent applies periodic action by alternating between even and odd phases in the circuit operation. During even phases, one set of matching transistors is activated while during odd phases, the other set is activated. This periodic switching allows the circuit to accumulate statistical data over multiple cycles, reducing random offsets through averaging while maintaining high circuit speed during each phase transition.
2Measurement precision
If auto zero method is used to reduce random offsets, then offset reduction is achieved, but application is limited to certain circuits
Solution Approach 1:
The patent implements universality by designing a mismatch reduction circuit that can be applied to various analog circuits including operational amplifiers, comparators, current mirrors, ADCs, and DACs. The circuit uses universal components such as switches, capacitors, and digital logic that can be integrated into different circuit architectures, making the offset reduction technique broadly applicable across multiple circuit types rather than limited to specific applications.
3Measurement precision
If digital means with phase controller is used to alternate connections, then random offsets are reduced through averaging, but device complexity increases
Solution Approach 1:
The patent applies merging by integrating multiple functions into unified circuit blocks. The phase controller, switches, capacitors, and digital logic are combined into a cohesive mismatch reduction circuit that works together as a single system. The even and odd phase operations are merged into a unified periodic process, and the data accumulation and averaging functions are integrated into the same circuit architecture, reducing overall system complexity despite the added functionality.
Data Source
AI summary
An analog circuit including a pair of input nodes and a pair of output nodes is coupled to a mismatch reduction circuit including an input node, an output node, a phase controller that times even and odd phases, an input switch, and an output switch. The input switch electrically connects the mismatch reduction circuit input node to a first node of the pair of analog circuit input nodes during each even phase and to electrically connects the mismatch reduction circuit input node to a second node of the pair of analog circuit input nodes during each odd phase. The output switch electrically connects a first node of the pair of analog circuit output nodes to the mismatch reduction circuit output node during each even phase and electrically connects a second node of the pair of analog circuit output nodes to the mismatch reduction circuit output node during each odd phase.