Integrated Photonic Switch ASIC Package

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Solution Overview

Problem

Optical interconnect systems using discrete electronic and photonic dies are expensive, power-intensive, and suffer from latency due to the separation of components, which necessitates large serializer/deserializer circuits.

Innovation Solution

Integration of a photonic die, electronic die, and switch ASIC into a single package, with components of the electronic die integrated into the switch ASIC, reducing the distance and size of serializer/deserializer circuits, and eliminating the need for through-silicon vias.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If discrete electronic die and photonic die are used for each individual lane, then signal processing and control functions are achieved, but cost increases and power consumption increases

Engineering Contradiction:
Improvesignal processing functionVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent combines multiple discrete electronic dies and photonic dies into a single integrated package. The electronic die is coupled to the photonic die in close proximity, allowing multiple lanes to share common components and infrastructure. This merging reduces the total number of discrete components, lowering power consumption while maintaining signal processing functions.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated package design allows a single electronic die to serve multiple photonic dies simultaneously. The electronic die provides universal control and processing functions for multiple optical lanes, eliminating the need for separate dedicated electronic dies for each lane. This multi-functionality reduces overall power consumption and component count.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If discrete electronic die and photonic die are used for each individual lane, then signal processing and control functions are achieved, but the amount of area needed increases

Engineering Contradiction:
Improvesignal processing functionVSAvoidarea needed
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges multiple discrete dies into a single integrated package where the electronic die and photonic die are coupled in close proximity. This consolidation significantly reduces the total area required compared to having separate discrete dies for each lane, while maintaining all necessary signal processing and control functions.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions from a distributed two-dimensional arrangement of discrete dies to a compact three-dimensional integrated package. By stacking or closely coupling the electronic die and photonic die in vertical or lateral proximity, the design achieves higher density and reduces the footprint area required for the same functionality.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If electronic die is separated from switch ASIC by significant distance, then discrete component layout is simplified, but performance reduces and latency increases

Engineering Contradiction:
Improvecomponent layoutVSAvoidlatency
Core Design Contradiction:
Ease of manufactureVSLoss of time

Solution Approach 1:

The patent merges the electronic die and photonic die into a single integrated package in close proximity, eliminating the significant separation distance found in discrete implementations. This integration maintains ease of manufacture through standardized packaging while dramatically reducing signal transmission latency between the electronic die and switch ASIC.

Inventive Principle:
Principle #5Merging (Combining)

4Ease of manufacture

If significant distance separates eDie from switch ASIC, then discrete component layout is simplified, but larger serializer/deserializer circuits are needed

Engineering Contradiction:
Improvecomponent layoutVSAvoidserdes circuit size
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent combines the electronic die and photonic die in close proximity within an integrated package, reducing the distance signals must travel between components. This integration allows for smaller, more efficient serializer/deserializer circuits compared to discrete implementations, thereby reducing device complexity while maintaining ease of manufacture through standardized packaging processes.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11460651B2Photonics package integration
Publication Date: 2022.10.04 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11460651B2 patent drawing
  • US11460651B2 patent drawing
  • US11460651B2 patent drawing

AI summary

An interconnect package integrates a photonic die, an electronic die, and a switch ASIC into one package. At least some of the components in the electronic die, such as, for example, the serializer/deserializer circuits, transceivers, clocking circuitry, and/or control circuitry are integrated into the switch ASIC to produce an integrated switch ASIC. The photonic die is attached and electrically connected to the integrated switch ASIC.