Photonic Switch Package Integration for Lower-Latency Optical Interconnects

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Solution Overview

Problem

Optical interconnect systems using discrete electronic and photonic dies are expensive, power-intensive, and inefficient due to the need for large serializer/deserializer circuits and significant distance between components, leading to increased latency and cost.

Innovation Solution

Integration of a photonic die, electronic die, and switch ASIC into a single package, with components of the electronic die integrated into the switch ASIC, reducing the size and power consumption of serializer/deserializer circuits and eliminating the need for through-silicon vias.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If discrete electronic die and photonic die are used for each individual lane, then signal processing and control functions are achieved, but cost increases and power consumption increases

Engineering Contradiction:
Improvesignal processing functionVSAvoidnumber of discrete dies
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines multiple discrete electronic dies and photonic dies into a single integrated photonic package. The electronic die is integrated with the photonic die in close proximity, eliminating the need for separate discrete dies for each lane. This merging reduces the total number of components while maintaining signal processing and control functions through shared resources and optimized interconnections.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If discrete electronic die and photonic die are used for each individual lane, then signal processing is achieved, but area occupied increases

Engineering Contradiction:
Improvesignal processing functionVSAvoidpackage area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

Multiple lanes share common electronic die resources and control circuitry within a single integrated package, dramatically reducing the total area required compared to discrete dies for each lane. The compact integration allows efficient spatial utilization of photonic and electronic components.

Inventive Principle:
Principle #5Merging (Combining)

3Ease of manufacture

If electronic die is separated from switch ASIC by significant distance, then discrete component layout is simplified, but latency increases and performance decreases

Engineering Contradiction:
Improvecomponent layoutVSAvoidsignal latency
Core Design Contradiction:
Ease of manufactureVSLoss of time

Solution Approach 1:

The electronic die is nested within or immediately adjacent to the photonic die in a tightly integrated package, placing critical signal processing components as close as possible to the switch ASIC. This nested arrangement minimizes signal path length and latency while maintaining manufacturing feasibility through advanced packaging techniques.

Inventive Principle:
Principle #7Nested doll (Nesting)

4Ease of manufacture

If significant distance exists between electronic die and switch ASIC, then component placement is easier, but larger serializer/deserializer circuits are needed

Engineering Contradiction:
Improvecomponent placementVSAvoidserializer/deserializer circuit size
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The electronic die containing serializer/deserializer circuits is merged with the photonic die in close proximity to the switch ASIC, reducing the distance over which high-speed signals must be transmitted. This integration allows for smaller, more efficient serdes circuits with reduced signal integrity challenges compared to discrete远距离 placements.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12174440B2Photonics package integration
Publication Date: 2024.12.24 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12174440B2 patent drawing
  • US12174440B2 patent drawing
  • US12174440B2 patent drawing

AI summary

An interconnect package integrates a photonic die, an electronic die, and a switch ASIC into one package. At least some of the components in the electronic die, such as, for example, the serializer/deserializer circuits, transceivers, clocking circuitry, and/or control circuitry are integrated into the switch ASIC to produce an integrated switch ASIC. The photonic die is attached and electrically connected to the integrated switch ASIC.