Photoresist Planarization Layer for Semiconductor Chip Alignment
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Solution Overview
Problem
The alignment and adhesion issues between nozzle plates and semiconductor chips in fluid jet ejection heads lead to misalignment and delamination, exacerbated by the reflectivity of metal layers, which complicates the imaging and development of conventional photoresist materials used for planarization layers.
Innovation Solution
A photoresist formulation with specific compositions, including 8-8.5 wt.% photoacid generator, 2-3.6 wt.% photoinitiator, 0.35-0.5 wt.% green dye, 35-46 wt.% multifunctional epoxy, 35-50 wt.% difunctional epoxy, and 1-2.6 wt.% silane adhesion promoter, applied as a planarization layer to improve surface smoothness and reduce metal reflectivity, allowing for precise alignment and increased process window during imaging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a conventional photoresist material is used as a planarization layer, then the layer can be applied to the semiconductor chip, but the metal layer reflectivity causes poor imaging and incomplete material removal from critical areas
Solution Approach 1:
The patent modifies the photoresist formulation by incorporating specific additives including a green dye (0.1-1.0 wt%), yellow dye (0.1-1.0 wt%), and blue dye (0.1-1.0 wt%) to alter the optical properties of the planarization layer. This changes the absorption and reflection characteristics of the metal layers underneath, enabling proper imaging and development of the photoresist pattern without incomplete material removal.
Solution Approach 2:
The patent creates a composite photoresist material system that combines conventional photoresist base material with multiple dye additives and specific chemical components (photoinitiator, plasticizer, solvent). This composite formulation addresses the reflectivity issue by integrating optical modifiers directly into the photoresist matrix, allowing simultaneous achievement of proper adhesion, planarization, and imaging capabilities.
2Ease of manufacture
If the surface of the semiconductor chip is irregular due to deposited metal layers, then the chip can be manufactured with required functional layers, but adhesion between the nozzle plate and chip deteriorates and misalignment occurs
Solution Approach 1:
The patent applies a planarization layer of photoresist material to the irregular semiconductor chip surface before attaching the nozzle plate. This preliminary planarization step creates a smooth intermediate surface that ensures proper adhesion and alignment, preventing misalignment and delamination issues that would otherwise occur due to the underlying metal layer irregularities.
Solution Approach 2:
The photoresist planarization layer serves as an intermediary between the irregular semiconductor chip surface and the nozzle plate. This intermediate layer compensates for surface irregularities, providing a uniform bonding surface that maintains reliable adhesion and precise alignment while allowing the underlying functional metal layers to remain in their required positions.
3Ease of manufacture
If multiple adhesives and curing steps are used in assembly, then the ejection head components can be connected, but opportunities for component misalignment and delamination increase
Solution Approach 1:
The patent performs preliminary alignment and planarization using the photoresist layer before final assembly operations. By establishing precise alignment and a smooth surface early in the process, subsequent assembly steps with multiple adhesives have reduced opportunities for misalignment and delamination, as the critical alignment has already been secured.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The improved photoresist formulation enhances the alignment of mask features on semiconductor chips, increases the processability of wafers, and reduces delamination, resulting in improved accuracy and reliability of fluid droplet placement in fluid jet ejection heads.
Implementation Method 1
The planarization layer is exposed to actinic radiation to cure the planarization layer
Implementation Method 2
from about 2 to about 3.6 wt.% photoinitiator based on a total weight of the layer devoid of solvent
Data Source
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AI summary
A planarization layer, a planarizing method, and a semiconductor chip, which were effective in increasing the processability of wafers containing semiconductor chips for ejection heads, are provided. The planarization layer has a thickness ranging from about 2 to about 3 microns, and contains from about 8.0 to about 8.5 wt.% photoacid generator; from about 2 to about 3.6 wt.% photoinitiator; from about 0.35 to about 0.5 wt.% green dye; from about 35 to about 46 wt.% multifunctional epoxy compound; from about 35 to about 50 wt.% of one or more difunctional epoxy compounds; and from about 1 to about 2.6 wt.% silane adhesion promoter, wherein all weight percent is based on a total weight of the layer devoid of solvent.