PIC Backside Shielding Structure for 3D Stack EMI Isolation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The packaging of silicon photonics devices with 3D stacking of Electronic IC and Photonic IC faces challenges due to unshielded transmission lines causing electromagnetic interference, particularly in the Z direction, which affects sensitive photodetectors and results in high levels of electrical coupling and crosstalk between transmitter and receiver paths.

Innovation Solution

A method involving through-silicon-vias and backside metallization is employed to form electrical shields, using vias to penetrate the silicon substrate and connect to a conductive layer on the backside, forming cages around photonic subcircuits to terminate electromagnetic fields, with separate grounding for each shield to prevent interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If unshielded transmission lines are used in photonic integrated circuits, then manufacturing simplicity is maintained, but electromagnetic interference increases and affects photodetectors

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidelectromagnetic interference
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

A conductive shielding layer is introduced as an intermediary element between the unshielded transmission lines and the photodetectors. This shielding layer, connected to ground through vias, acts as a mediator that intercepts and redirects electromagnetic fields, preventing them from reaching sensitive photodetectors while maintaining the simplicity of unshielded transmission line design

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The solution adds a vertical dimension to electromagnetic field management by placing a conductive shielding layer at a different Z-height within the photonic integrated circuit stack. This third-dimensional approach creates electromagnetic field termination planes that block vertical field propagation without requiring changes to the lateral transmission line geometry

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Temperature

If a metal plate is used on the backside for heat dissipation without electrical grounding, then thermal management is improved, but electrical coupling and crosstalk increase

Engineering Contradiction:
Improveheat dissipationVSAvoidelectrical coupling and crosstalk
Core Design Contradiction:
TemperatureVSObject-generated harmful factors

Solution Approach 1:

The backside metal plate is designed to serve multiple functions simultaneously: it provides thermal management by conducting heat away from active regions, and it provides electromagnetic shielding by being electrically connected to ground through vias. This multi-functional design eliminates crosstalk while maintaining the thermal benefits of the metal plate

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Object-affected harmful factors

If through-silicon-vias and backside metallization are used to form electrical shields, then electromagnetic interference is suppressed, but device complexity increases

Engineering Contradiction:
Improveelectromagnetic interference suppressionVSAvoidstructure complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The electromagnetic shielding is segmented into discrete regions corresponding to different functional blocks within the photonic integrated circuit. Rather than implementing a continuous shield across the entire device, conductive layers are placed selectively around specific transmitter and receiver subcircuits, reducing via count and manufacturing complexity while maintaining shielding effectiveness where needed

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively suppresses electromagnetic interference, achieving isolation of -125 dB between photonic subcircuits up to 30 GHz, significantly reducing crosstalk and maintaining the integrity of signal transmission and reception.

Implementation Method 1

forming a conductive layer on a backside of the photonic integrated circuit chip to act as robust ground thus terminating the electric and magnetic fields

Methodology Applied
Scientific EffectElectromagnetic shielding: Faraday Cage

Data Source

PatentEP4510188B1Method and structure for shielding electromagnetic inteference in photonic integrated circuits stacked up electronic integrated circuits
Publication Date: 2026.02.11 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • EP4510188B1 patent drawingFigure 1
  • EP4510188B1 patent drawingFigure 2
  • EP4510188B1 patent drawingFigure 3

AI summary

Method and structure for shielding electromagnetic interference in photonic integrated circuits (PIC) disposed on electronic integrated circuits (EIC). The invention addresses the electromagnetic interference problem by employing vias (451, 452) through the PIC's bulk silicon substrate (101). The invention also uses a conductive layer (410) covering the backside of the PIC bulk silicon substrate (101) on which the metal heat spreader can be placed. Now, the vias (451, 452) can make electrical contact from the reference net (120) formed for PIC's light transmission component on one or more metal layers (121, 122, 123) of the PIC to the conductive layer on the backside of the PIC. Such an arrangement allows for robust electrical connection and allows the metal heat spreader to act as robust ground thus terminating the electromagnetic fields.