Semiconductor Device Piezoelectric Pattern Bonding

Solution Overview

Problem

Conventional methods for connecting or bonding metal patterns in semiconductor devices require high-temperature processes, which can mechanically, physically, or chemically damage the fine circuit patterns, posing a challenge for fabricating highly integrated semiconductor devices without causing damage.

Innovation Solution

The integration of a piezoelectric pattern between metal patterns and passivation layers in semiconductor devices allows for bonding through-silicon-vias and pads without a heat process, using a piezoelectric pattern to facilitate electrical and physical bonding without applying heat, thereby avoiding damage to internal circuit elements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If high-temperature heating process is used to bond metal patterns, then bonding strength is improved, but circuit patterns are damaged due to heat budget

Engineering Contradiction:

Improvebonding strengthVSAvoidheat damage to circuit patterns

Core Design Contradiction:

StrengthVSObject-affected harmful factors

Solution Approach 1:

The patent replaces the thermal bonding mechanism with a mechanical bonding mechanism. Specifically, it uses a eutectic alloy layer that undergoes solidification to bond metal patterns, substituting the high-temperature heating process with a controlled solidification process that occurs at lower temperatures, thereby avoiding heat damage to fine circuit patterns while achieving strong bonding.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the bonding temperature parameter by utilizing the eutectic point of the alloy system. By selecting an alloy composition with a eutectic point below the damage threshold of the circuit patterns (e.g., below 400°C), the bonding process can proceed at a temperature that ensures strong bonding without causing thermal damage to the sensitive circuit elements.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If high-temperature process is applied for metal pattern bonding, then bonding reliability is improved, but manufacturing precision deteriorates due to heat-induced damage

Engineering Contradiction:

Improvebonding reliabilityVSAvoidcircuit pattern integrity

Core Design Contradiction:

ReliabilityVSManufacturing precision

Solution Approach 1:

The patent replaces the thermal bonding mechanism with a mechanical bonding mechanism. Specifically, it uses a eutectic alloy layer that undergoes solidification to bond metal patterns, substituting the high-temperature heating process with a controlled solidification process that occurs at lower temperatures, thereby avoiding heat damage to fine circuit patterns while achieving strong bonding.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the bonding temperature parameter by utilizing the eutectic point of the alloy system. By selecting an alloy composition with a eutectic point below the damage threshold of the circuit patterns (e.g., below 400°C), the bonding process can proceed at a temperature that ensures strong bonding without causing thermal damage to the sensitive circuit elements.

Inventive Principle:

Principle #35Parameter changes

3Strength

If conventional heating method is used for through-silicon-via bonding, then bonding strength is achieved, but device life is reduced due to thermal stress

Engineering Contradiction:

Improvebonding strengthVSAvoiddevice life

Core Design Contradiction:

StrengthVSDuration of action of stationary object

Solution Approach 1:

The patent changes the bonding temperature parameter by utilizing the eutectic point of the alloy system. By selecting an alloy composition with a eutectic point below the damage threshold of the circuit patterns (e.g., below 400°C), the bonding process can proceed at a temperature that ensures strong bonding without causing thermal damage to the sensitive circuit elements.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent introduces a eutectic alloy layer as a cushioning intermediate layer between the metal patterns and the substrate. This layer absorbs and distributes thermal stress during the bonding process, protecting the underlying circuit patterns and through-silicon-vias from thermal damage, thereby extending device life while maintaining bonding strength.

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables stable fabrication and operation of semiconductor devices by eliminating the need for a heat budget, allowing for direct bonding of through-silicon-vias and pads using physical pressure, thus maintaining performance and extending the life of the devices.

Implementation Method 1

a piezoelectric pattern formed between the metal pattern and the passivation layer

Methodology Applied

Scientific EffectPiezoelectric effect: Piezoelectric Effect

Data Source

PatentUS9431341B2Semiconductor device having metal patterns and piezoelectric patterns

Publication Date: 2016.08.30 SAMSUNG ELECTRONICS CO LTD

AI summary

Provided is a semiconductor device. The semiconductor device includes a passivation layer defining a metal pattern on a first surface of a substrate, an inter-layer insulating layer disposed on a second surface of the substrate, and a piezoelectric pattern formed between the metal pattern and the passivation layer on the first surface of the substrate. A through-silicon-via and/or a pad can be directly bonded to another through-silicon-via and/or another pad by applying pressure only, and without performing a heat process.