Piezoelectric-Driven Transistor Stress for Dynamic Power and Performance
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Solution Overview
Problem
Conventional semiconductor devices face challenges in simultaneously achieving low power consumption and high performance operation, as they often require a trade-off between these opposing characteristics, leading to performance degradation when power is reduced and increased power consumption when performance is enhanced.
Innovation Solution
A semiconductor device incorporating a piezoelectric material attached to the substrate, which applies stress to transistors in a direction parallel to the gate, allowing for adjustable operating characteristics by varying the applied voltage, thereby enabling both low power and high performance modes without separate device fabrication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional semiconductor devices are designed for low power consumption, then power consumption is reduced, but performance is degraded
Solution Approach 1:
The patent applies piezoelectric materials to dynamically adjust the electrical characteristics of transistors through mechanical stress. By controlling the voltage applied to the piezoelectric layer, the device can switch between different performance states (high performance and low power consumption modes), making the device characteristics dynamic rather than fixed during fabrication
Solution Approach 2:
The patent changes the physical state of the semiconductor device by applying mechanical stress through piezoelectric materials. This stress alters the band structure and carrier mobility of the transistor, thereby changing electrical parameters such as threshold voltage and current drive capability, enabling the same device to operate in different performance regimes
2Productivity
If conventional semiconductor devices are designed for high performance operation, then performance is improved, but power consumption is increased
Solution Approach 1:
The piezoelectric mechanism enables dynamic control of device characteristics, allowing the system to operate in high performance mode when needed and switch to low power mode when performance requirements are reduced, thus avoiding continuous high power consumption
Solution Approach 2:
By applying controlled mechanical stress through the piezoelectric layer, the device modifies its electrical parameters to achieve high performance operation only when necessary, rather than maintaining high performance characteristics continuously, thereby reducing overall power consumption
3Adaptability or versatility
If separate devices are fabricated for different applications, then application-specific optimization is achieved, but device complexity increases
Solution Approach 1:
The patent makes a single semiconductor device capable of performing multiple functions by integrating piezoelectric materials that can adjust device characteristics on-demand. The same transistor structure can be optimized for different applications (low power, high performance, etc.) through electrical control of the piezoelectric layer, eliminating the need for separate fabricated devices for each application
Solution Approach 2:
The dynamic control capability allows one device to replace multiple application-specific devices, as the piezoelectric mechanism can adjust the device characteristics to match different application requirements in real-time, simplifying the overall system architecture
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows for efficient heat dissipation and improved conductivity, reducing leakage current and standby power consumption while maintaining high performance, enabling a single device to operate in both low power and high performance modes effectively.
Implementation Method 1
a piezoelectric formed to be contacted with the substrate. The piezoelectric is formed heat-expendably in a direction parallel to a gate direction of the transistors
Implementation Method 2
a heat dissipating plate formed over the power device
Implementation Method 3
The heat dissipating plate may include a metal having a larger thermal expansion coefficient than silicon nitride
Data Source
AI summary
A substrate including a plurality of transistors, and a piezoelectric formed to be contacted with the substrate. The piezoelectric is formed heat-expendably in a direction parallel to a gate direction of the transistors.


