PIM MAC Circuit Multiplication-and-Accumulation Neural Network Speed
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Solution Overview
Problem
The increasing complexity of neural networks in artificial intelligence requires significant computational resources, leading to performance degradation due to limited data communication between separate memory and processor systems, necessitating the integration of processing and memory within a semiconductor chip for improved neural network computing.
Innovation Solution
A processing-in-memory (PIM) device with a MAC circuit that performs multiplication-and-accumulation (MAC) and element-wise multiplication (EWM) operations, integrating memory regions for weight, vector, and constant data, allowing for efficient arithmetic operations directly within the memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If separate memory and processor systems are used, then device complexity is reduced, but data processing speed deteriorates due to limited data communication
Solution Approach 1:
The patent merges memory and processing functions into a single integrated device. The PIM device combines memory cells for data storage with MAC circuits for multiplication-and-accumulation operations, eliminating the need for separate memory and processor systems. This integration allows arithmetic operations to be performed directly within the memory structure, significantly improving data processing speed by eliminating data communication bottlenecks between separate components.
2Productivity
If PIM device performs arithmetic operations internally, then data processing speed is improved, but device complexity increases due to integration of processing and memory
Solution Approach 1:
The PIM device implements multi-functionality by enabling the same integrated structure to perform both memory storage and multiple types of arithmetic operations. The MAC circuit can selectively execute either MAC arithmetic operations (multiplication-and-accumulation) or EWM arithmetic operations (element-wise multiplication) based on operational mode, allowing a single device structure to handle diverse neural network computing tasks without requiring separate specialized components for each function.
Data Source
AI summary
A processing-in-memory (PIM) device includes a first memory region, a second memory region, a third memory region, and a multiplication-and-accumulation MAC circuit. The first memory region is configured to store weight data comprised of elements of a weight matrix. The second memory region is configured to store vector data comprised of elements of a vector matrix. The third memory region is configured to store constant data. The MAC circuit is configured to selectively perform a MAC arithmetic operation of the weight data and the vector data or an element-wise multiplication (EWM) arithmetic operation of the weight data and the constant data.