PIM MAC Circuit With Parallel ECC for Error-Corrected AI Computing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Processing-in-memory (PIM) devices face challenges in performing efficient multiplication/accumulation (MAC) operations due to errors in data, which degrade the performance of artificial intelligence applications, particularly in deep learning, where integrated processor and memory systems are limited by data communication constraints.
Innovation Solution
A PIM device is designed with a first storage region for data and a second storage region for parity, incorporating an error correction code (ECC) logic circuit and a MAC operator that simultaneously executes ECC calculations and multiplying operations, generating error codes to compensate for errors in the multiplication results.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If PIM device performs MAC operations directly in memory, then data processing speed is improved, but errors in data degrade calculation accuracy
Solution Approach 1:
The patent applies preliminary action by performing ECC calculations simultaneously with MAC operations on data before the multiplication is completed. The ECC logic circuit detects and corrects errors in the first data during the same time period that the MAC operator performs multiplication, ensuring accurate results without delaying the processing speed.
Solution Approach 2:
The patent introduces an intermediary mechanism by adding ECC logic circuit functionality within the MAC operator structure. The ECC circuit acts as an intermediary that processes data alongside the MAC operation, detecting errors and generating correction values that are then applied to maintain calculation accuracy while preserving the direct-in-memory processing speed advantage.
2Reliability
If ECC calculation is performed separately from MAC operation, then error correction is thorough, but calculation time increases
Solution Approach 1:
The patent merges the ECC logic circuit and MAC operator into a single integrated structure where both operations can execute simultaneously. The ECC calculation for error detection and the MAC multiplication operation share the same processing timeline, allowing error correction to be performed thoroughl y without adding separate calculation time overhead.
Solution Approach 2:
The patent ensures continuity of useful action by making the ECC calculation and MAC operation proceed in parallel without interruption. Both operations utilize the available data continuously, with the ECC circuit working on error detection while the MAC operator performs multiplication, maximizing resource utilization and eliminating idle time.
3Adaptability or versatility
If PIM device uses separate memory and processor, then data communication flexibility is maintained, but AI performance is degraded due to communication limitations
Solution Approach 1:
The patent merges the processor and memory into a single PIM device where MAC operations are performed directly within the memory structure. This integration eliminates the need for continuous data communication between separate memory and processor components, thereby removing the communication bottleneck that limited AI performance while maintaining the flexibility of the PIM architecture.
Data Source
AI summary
A Processing-In-Memory (PIM) device includes a first storage region and a multiplication/accumulation (MAC) calculator. The first storage region configured to store a first data. The MAC operator configured to execute a MAC calculation on the first data and second data in an MAC mode. When an error exists in the first data, the MAC operator compensates multiplication result data generated by a multiplying calculation of the first data and the second data and executes an adding calculation of the compensated multiplication result data.