Pin Electronics PCB Layout for 40 Gbps Memory Test Accuracy
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional automatic test equipment struggles to accurately measure high-speed memory devices operating at speeds exceeding 20 Gbps due to signal degradation and waveform distortion caused by long transmission distances and noise contamination in power supply voltage.
Innovation Solution
The interface device is designed with multiple pin electronics ICs integrated into a printed circuit board close to the device under test, using a Flexible Printed Circuit cable and a linear regulator to reduce transmission distance and noise, and employing an interposer for low-loss electrical contact, thereby minimizing signal loss and noise contamination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the test head and device under test are connected using conventional cable transmission, then the device can be tested, but signal degradation and waveform distortion occur at high speeds exceeding 20 Gbps
Solution Approach 1:
The patent introduces an interposer as an intermediary component between the test head and device under test. This interposer provides low-loss electrical contact through multiple contact points, enabling accurate measurement of high-speed signals (28 Gbps, 40 Gbps) by reducing signal degradation that occurs in conventional cable-based connections
Solution Approach 2:
The connection system is segmented into multiple discrete contact points on the interposer rather than using a single cable transmission path. This segmentation allows each contact point to handle high-speed signals with minimal interference and loss, collectively enabling accurate high-speed measurement
2Device complexity
If the pin electronics are mounted on a separate board away from the device under test, then the device structure is simplified, but transmission distance increases causing signal loss
Solution Approach 1:
The patent merges the pin electronics functionality directly into the interposer structure. The comparison units and control circuits are integrated onto the same substrate as the contact points, eliminating the need for separate cable connections and reducing transmission distance, thereby minimizing signal loss while maintaining structural simplicity
3Ease of manufacture
If conventional power supply wiring is used, then the device is easy to manufacture, but noise contamination occurs affecting measurement accuracy
Solution Approach 1:
The patent implements local quality control by providing dedicated power supply wiring for each pin electronics unit directly on the interposer. This localized power supply approach reduces noise contamination by minimizing shared electrical paths and interference, while the overall manufacturing process remains simple through standardized integration
Data Source
AI summary
An interface device is provided between a test head and a DUT. The interface device includes pin electronics ICs, RAM, a pin controller, and nonvolatile memory. The RAM stores data based on a device signal received from the DUT by means of the multiple pin electronics ICs. The pin controller controls the multiple pin electronics ICs according to a control signal from the test head. The multiple pin electronics ICs, the RAM, and the pin controller are mounted on a pin electronics PCB.