Continuous-Time Pipeline ADC Delay Matching for Higher Stage Resolution
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Solution Overview
Problem
In continuous-time pipeline ADCs (CTP ADCs), achieving precise delay matching between the analog delay element and the ADC-DAC path is challenging, which affects the gain of the analog filter block and the resolution of the digitized signal.
Innovation Solution
The proposed solution involves a continuous-time analog-to-digital converter circuit with an analog delay element and an ADC-DAC path, where the delay of the ADC-DAC path is matched to the analog delay element using a delay control device. This is achieved through a combination of coarse and fine delay control mechanisms, allowing for precise tuning of the delay mismatch.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If delay matching is performed using traditional methods in CTP ADC, then the delay between analog path and ADC-DAC path can be partially compensated, but the matching precision is insufficient and cannot account for PVT variations
Solution Approach 1:
The delay control device is segmented into multiple delay elements that can be independently controlled. Each delay element can be selectively enabled or disabled to provide coarse delay adjustment, while a fine delay control mechanism provides continuous fine-tuning. This segmentation allows the system to achieve both high precision delay matching and wide tuning range to compensate for PVT variations.
Solution Approach 2:
The delay control device implements dynamic delay adjustment by enabling individual delay elements based on detected delay mismatch. The system continuously monitors the delay between analog and digital paths and dynamically activates appropriate delay elements to compensate for variations caused by PVT conditions, achieving adaptive delay matching.
2Reliability
If switches are used in the analog path to match delays, then delay compensation can be achieved, but the circuit complexity increases and the analog path becomes more difficult to control
Solution Approach 1:
The invention introduces a delay control device as an intermediary component between the analog delay element and the ADC-DAC path. This device acts as a mediator that provides delay compensation without requiring switches in the critical analog signal path. The delay control device processes control signals to enable/disable delay elements, isolating the switching complexity from the analog path while achieving the desired delay matching.
Solution Approach 2:
The invention replaces mechanical switches in the analog path with a digitally-controlled delay adjustment mechanism. Instead of using analog switches to compensate for delay, the system uses a delay control device that adjusts the delay electronically through controlled enabling/disabling of delay elements, substituting the mechanical switching approach with a more reliable electronic control method.
3Measurement precision
If the gain of the analog filter block is increased to extract more bits per stage, then the resolution improves, but the delay mismatch becomes more critical and harder to control
Solution Approach 1:
The system performs preliminary delay matching by detecting the delay mismatch between analog and digital paths before processing the signal through the analog filter block. The delay control device pre-adjusts the delay using its segmented delay elements to compensate for anticipated delay variations, ensuring that when the signal passes through the high-gain analog filter, the delay mismatch is already minimized, enabling accurate high-resolution conversion.
Data Source
AI summary
A continuous-time analog-to-digital converter circuit includes an input to which an analog input signal can be applied; an analog delay element being interconnected between the input and a first summation node; and an ADC-DAC path interconnected between the input and the first summation node. The ADC-DAC path digitizes the analog input signal and to reconvert the digitized analog input signal back to analog and to subtract the reconverted signal at the first summation node, the ADC-DAC path includes a switch interconnected between the input and a sub ADC the switch samples the analog input with a specified sampling rate. A sub DAC is interconnected between the sub ADC and the first summation node and delays of the analog delay element and the ADC-DAC path are matched by means of a delay control element. An output at the first summation node is filtered by a filter element. An output of the filter element is sampled by the specified sampling rate. A backend ADC is connected to a second summation node configured to digitize the sampled output of the filter element. The ADC-DAC path is configured to match its delay to the delay of the analog delay element.