Pipeline SAR ADC Residue Amplifier Offset Cancellation Calibration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Pipeline SAR ADCs face challenges in achieving accurate residue amplification due to offset errors in the residue amplifier, which affect the overall conversion accuracy.
Innovation Solution
A method involving a controller that calibrates the residue amplifier by determining calibrated gains based on calibrated residue voltages, and applying an offset cancellation voltage to compensate for amplifier offsets, thereby ensuring accurate amplification and inter-stage signal transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If pipeline SAR ADC architecture is used to increase conversion speed, then productivity is improved, but measurement precision deteriorates due to residue amplifier offset errors
Solution Approach 1:
The patent applies preliminary action by performing offset calibration of the residue amplifier before the actual conversion process. The controller measures and stores offset values for different digital output codes during a calibration phase, then uses these pre-measured offset values to correct the conversion results during normal operation, thereby eliminating the need for complex real-time offset compensation circuits.
Solution Approach 2:
The patent implements feedback by using the measured offset values to adjust and correct the conversion process. The controller measures the offset between analog input and digital output, stores this information, and applies it to compensate for subsequent conversions, creating a closed-loop system that continuously improves accuracy based on measured errors.
2Productivity
If residue amplifier gain is increased to improve signal transfer, then productivity is improved, but measurement precision deteriorates due to gain errors and offset amplification
Solution Approach 1:
The patent uses feedback by measuring the actual gain and offset of the residue amplifier through controlled test inputs and comparing the amplified outputs against expected values. The measured gain and offset parameters are stored and used to correct subsequent signal amplification operations, enabling the system to compensate for amplifier imperfections while maintaining high gain for fast conversion.
Solution Approach 2:
The patent applies parameter changes by dynamically adjusting the compensation parameters (gain and offset values) based on measured amplifier characteristics. The controller modifies the digital correction values according to the specific amplifier performance observed during calibration, allowing the system to adapt to variations in amplifier behavior while maintaining high conversion speed.
Data Source
AI summary
A controller obtains a first calibrated gain of a residue amplifier. The residue amplifier amplifies a first residue voltage to a voltage corresponding to a first output code of a second stage of the pipelined ADC. The first residue voltage is output from a capacitive digital-to-analog converter (CDAC) of a first stage of the pipelined ADC. The controller obtains a second calibrated gain of the residue amplifier. The residue amplifier amplifies a second residue voltage to a voltage corresponding to a second output code of the second stage of the pipelined ADC. The second residue voltage is output from the CDAC of the first stage of the pipelined ADC. The controller determines a final calibrated gain of the residue amplifier based on the first calibrated gain and the second calibrated gain.