Pipelined ADC Calibration Using Correlated Dither Gain Estimation
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Solution Overview
Problem
Pipelined analog-to-digital converters (ADCs) face limitations due to inter-stage gain errors and non-linearity, which are challenging to address with conventional calibration techniques that consume significant dynamic range and require high back-end resolution, leading to potential estimation errors.
Innovation Solution
A method involving the injection of a small, multi-level digital dither signal with an odd number of levels and proper fractional amplitude into stages near the input, using a calibration circuit with dither injection, correlation, and correction circuits to estimate and correct gain errors, while minimizing power consumption and dynamic range overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional calibration techniques use large amplitude dither signals, then calibration accuracy is improved, but dynamic range consumption increases and power consumption increases
Solution Approach 1:
The patent changes the amplitude parameter of the dither signal from large to small (less than 1/4 of full-scale input signal), thereby reducing power consumption and dynamic range consumption while maintaining calibration effectiveness through correlation-based error detection
Solution Approach 2:
The patent replaces the traditional mechanical/direct measurement calibration approach with a correlation-based digital signal processing method, allowing small dither signals to be effectively processed and error detection to be achieved through digital correlation rather than direct analog measurement
2Use of energy by moving object
If small amplitude dither signals are used to save power and conserve dynamic range, then power consumption is reduced, but the back-end pipeline requires higher resolution to achieve the same effective calibration accuracy
Solution Approach 1:
The patent implements a feedback mechanism where the dither signal is correlated with the ADC output to detect gain errors, and the detected errors are used to adjust calibration coefficients, creating a closed-loop system that maintains accuracy with small dither signals
Solution Approach 2:
The patent introduces a correlation-based error detection mechanism as an intermediary between the small dither signal and the calibration process, allowing the small signal to effectively measure gain errors through correlation rather than direct measurement
3Measurement precision
If the back-end pipeline resolution is increased to handle small dither signals with higher accuracy, then calibration accuracy is improved, but hardware complexity increases and power consumption increases
Solution Approach 1:
The patent replaces the need for high-resolution back-end hardware with a correlation-based digital signal processing approach, where calibration accuracy is achieved through algorithmic processing rather than increased hardware resolution
Solution Approach 2:
The patent uses a simplified digital model (correlation calculation) to represent and process the dither signal characteristics, avoiding the need for complex high-resolution hardware while maintaining calibration accuracy
4Measurement precision
If more bits are used in the back-end to digitize small dither signals, then effective resolution is improved, but power consumption increases and hardware overhead increases
Solution Approach 1:
The patent uses feedback through correlation-based error detection to achieve high effective resolution without increasing back-end bit depth, as the correlation process extracts precise error information from small dither signals
Solution Approach 2:
The patent changes the processing approach from increasing bit depth to using correlation-based error detection, thereby maintaining effective resolution while reducing power consumption and hardware overhead
Data Source
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AI summary
A method and a corresponding device for calibrating a pipelined analog-to-digital converter (ADC) involve injecting a randomly determined amount of dither into one of a flash component and a multiplying digital-to-analog converter (MDAC) in at least one stage in the ADC. For each stage of the at least one stage a correlation procedure is performed to estimate, based on an output of the ADC, an amount of gain experienced by the injected dither after propagating through the stage. The stage is then calibrated based on its respective gain estimate.