Polycrystalline Silicon Diode for Reverse Write 3D Memory

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Solution Overview

Problem

Existing nonvolatile memory arrays face challenges in creating erasable or multi-state memory cells using conventional semiconductor materials, as they are difficult to scale to small sizes and require complex fabrication processes, such as those involving floating gates or exotic materials like chalcogenides.

Innovation Solution

A nonvolatile memory device comprising memory cells with a diode and a metal oxide antifuse dielectric layer, where the diode acts as a read/write element by switching between resistivity states in response to applied bias, allowing for the formation of erasable or multi-state cells using polycrystalline silicon or germanium p-i-n diodes in a cylindrical shape.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If floating gate or SONOS memory cells are used to achieve erasable or multi-state cells, then data storage capability is improved, but device fabrication complexity increases and scaling to small dimensions becomes difficult

Engineering Contradiction:
Improvedata storage capabilityVSAvoidfabrication complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent extracts the memory storage function from complex three-terminal devices (floating gate, SONOS) and implements it in a simplified two-terminal diode structure. The diode's inherent non-linear I-V characteristics and resistivity switching capability provide the memory function without requiring additional transistors or complex charge storage mechanisms, thereby reducing fabrication complexity while maintaining data storage capability

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent utilizes resistivity switching in the diode as the fundamental mechanism for data storage. By changing the resistivity parameter of the diode material through electrical stimulation (forming low-resistance or high-resistance states), the patent achieves multi-state memory functionality in a simple two-terminal structure, avoiding the need for complex charge storage mechanisms in floating gate or SONOS cells

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If chalcogenide materials are used to achieve erasable or multi-state memory cells, then data storage capability is improved, but manufacturing difficulty increases

Engineering Contradiction:
Improvedata storage capabilityVSAvoidmanufacturing difficulty
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent employs resistivity switching in conventional semiconductor diodes as the core mechanism for data storage. By electrically inducing low-resistance or high-resistance states in the diode, the patent achieves multi-state memory functionality using standard semiconductor materials and fabrication processes, eliminating the need to work with difficult-to-process chalcogenide materials

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces exotic, difficult-to-manufacture chalcogenide materials with conventional, widely-available semiconductor materials that can be processed using standard industrial fabrication techniques. This substitution maintains the desired memory functionality while dramatically improving ease of manufacture and compatibility with existing semiconductor production facilities

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Productivity

If memory cells are scaled to small dimensions to increase density, then productivity is improved, but fabrication complexity and manufacturing difficulty increase

Engineering Contradiction:
Improvememory densityVSAvoidfabrication complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent extracts the memory function from complex three-terminal devices and implements it in a simple two-terminal diode structure. This structural simplification enables easier scaling to small dimensions, as the diode requires fewer fabrication steps and smaller feature sizes compared to floating gate or SONOS cells, thereby increasing memory density without proportionally increasing fabrication complexity

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent utilizes resistivity switching in the diode as the fundamental mechanism for data storage. By changing the resistivity parameter of the diode material through electrical stimulation (forming low-resistance or high-resistance states), the patent achieves multi-state memory functionality in a simple two-terminal structure, avoiding the need for complex charge storage mechanisms in floating gate or SONOS cells

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enables the creation of dense, scalable nonvolatile memory arrays with reduced leakage current and the ability to achieve multiple stable resistivity states, allowing for both one-time-programmable and rewriteable memory cells with distinct data states, enhancing manufacturing robustness and data storage capabilities.

Implementation Method 1

the diode acts as a read/write element of the memory cell by switching from a first resistivity state to a second resistivity state different from the first resistivity state in response to an applied bias

Methodology Applied
Scientific EffectResistivity switching: Electrical Resistance

Implementation Method 2

a metal oxide antifuse dielectric layer

Methodology Applied
Scientific EffectDielectric breakdown: Antifuse

Data Source

PatentUS7830697B2High forward current diodes for reverse write 3D cell
Publication Date: 2010.11.09 SANDISK TECHNOLOGIES LLC
  • US7830697B2 patent drawing
  • US7830697B2 patent drawing
  • US7830697B2 patent drawing

AI summary

A nonvolatile memory device includes at least one memory cell which comprises a diode and a metal oxide antifuse dielectric layer, and a first electrode and a second electrode electrically contacting the at least one memory cell. In use, the diode acts as a read/write element of the memory cell by switching from a first resistivity state to a second resistivity state different from the first resistivity state in response to an applied bias.