Pitch-Aligned Sensing Circuitry for Shift Decisions in PIM DRAM
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Solution Overview
Problem
In processor-in-memory (PIM) DRAM implementations, data shifting is hindered by defective memory cells, leading to inefficiencies in data transfer and processing due to the need for external communication and power consumption, as well as mismatched pitch rules between memory arrays and processing resources.
Innovation Solution
The implementation of sensing circuitry on pitch with memory cells, capable of performing logical operations and shift decisions, allows for data to be shifted directly within the memory array without external transfer, using sense amplifiers and compute components to manage data movement and storage efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data shifting is performed in processor-in-memory DRAM implementations, then data transfer efficiency is improved, but defective memory cells in neighboring columns cause shift decision complexity and processing delays
Solution Approach 1:
The system performs preliminary actions by pre-determining the operational status of memory cells in neighboring columns before data shifting occurs. Status information is stored and readily available when shift operations are needed, allowing the system to make shift decisions without real-time analysis of memory cell conditions.
Solution Approach 2:
The system introduces an intermediary mechanism that monitors and reports the operational status of memory cells in neighboring columns to the shift decision logic. This intermediary status information acts as a mediator between the physical memory state and the control logic, enabling informed shift decisions without direct complex interaction with individual memory cells.
2Power
If external communication is used for data processing, then processing capability is improved, but power consumption increases
Solution Approach 1:
The memory array performs self-service by executing data processing operations internally without requiring external processor intervention. The sensing circuitry and control logic within the memory array autonomously handle shift decisions and data manipulation, eliminating the need for continuous external communication and reducing overall power consumption.
Solution Approach 2:
The system merges processing functions with storage functions by implementing processing resources directly within the memory array structure. This integration combines data storage and data processing into a single unified system, eliminating the need for separate external processors and reducing the power consumption associated with external communication.
3Ease of operation
If sensing circuitry is implemented on pitch with memory cells, then data shift decisions are improved, but device complexity increases
Solution Approach 1:
The sensing circuitry is designed with multi-functionality, serving both as a sensing mechanism for reading data and as a control mechanism for monitoring memory cell operational status. This universal design reduces the need for separate dedicated circuits, thereby limiting the increase in device complexity while maintaining accurate shift decision capabilities.
Data Source
AI summary
The present disclosure includes apparatuses and methods for shift decisions. An example apparatus includes a memory device. The memory device includes an array of memory cells and sensing circuitry coupled to the array via a plurality of sense lines. The sensing circuitry includes a sense amplifier and a compute component coupled to a sense line and configured to implement logical operations and a decision component configured to implement a shift of data based on a determined functionality of a memory cell in the array.