Photoelectric Pixel Capacitance Control for Low-Noise Imaging
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Solution Overview
Problem
Existing imaging devices face challenges in improving the signal-to-noise (S/N) performance, particularly in environments with varying brightness, due to increased charge accumulation in the photoelectric conversion element leading to noise generation.
Innovation Solution
The imaging device incorporates a photoelectric conversion element with specific capacitance conditions (C2 - C1)/C1 ≤ 0.2, along with charge blocking layers and varying bias voltages in exposure and non-exposure periods, to suppress charge accumulation and enhance S/N performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If charge accumulation region is used to collect photoelectric charges, then photoelectric conversion efficiency is improved, but charge accumulation leads to noise generation and degraded S/N performance
Solution Approach 1:
The patent applies dynamic control of bias voltage between the photoelectric conversion element and charge accumulation region. By switching the bias voltage between a first voltage (during exposure) to facilitate charge collection and a second voltage (during readout) to suppress noise, the system dynamically optimizes both photoelectric conversion efficiency and S/N performance, resolving the contradiction between charge accumulation benefits and noise generation
Solution Approach 2:
The patent implements periodic switching between exposure mode and readout mode with corresponding bias voltage changes. During exposure period, the first bias voltage enables efficient charge collection; during readout period, the second bias voltage suppresses noise. This periodic action allows the system to achieve both high photoelectric conversion efficiency and low noise by separating these functions in time
2Quantity of substance
If photoelectric conversion element accumulates more charges, then signal strength increases, but S/N performance deteriorates due to noise
Solution Approach 1:
The patent uses dynamic bias voltage control to manage the relationship between signal charge quantity and noise. By applying different bias voltages during exposure versus readout phases, the system can accumulate sufficient signal charges while suppressing noise generation, thereby maintaining both high signal quantity and reliable S/N performance
Solution Approach 2:
The patent applies preliminary action by setting the bias voltage to the first voltage value before light irradiation to optimize charge collection efficiency, then switches to the second voltage value after exposure to suppress noise before readout. This preliminary optimization of charge accumulation conditions followed by noise suppression enables achieving both high signal quantity and good S/N performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces noise by limiting charge accumulation, thereby improving the S/N performance and enabling high-quality imaging even in changing light conditions.
Implementation Method 1
a photoelectric conversion layer that is positioned between the first electrode and the second electrode, includes a donor semiconductor material and an acceptor semiconductor material, and generates electrons and holes by absorbing light
Data Source
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AI summary
An imaging device includes pixels (24) each including a photoelectric converter (10A) and a charge accumulation region. The photoelectric converter (10A) includes a lower electrode (2), an upper electrode (5), and a photoelectric conversion layer (4) that is positioned between the lower electrode (2) and the upper electrode (5) and generates electrons and holes by absorbing light. The charge accumulation region is electrically connected to the lower electrode (2) and accumulates signal charges that are either electrons or holes. When a predetermined bias voltage is applied between the lower electrode (2) and the upper electrode (5), (C2 - C1)/C1 ≤ 0.2 is satisfied, where C1 is a capacitance of the photoelectric converter (10A) in a state in which the photoelectric converter (10A) is not irradiated with light, and C2 is the capacitance of the photoelectric converter (10A) in a state in which the photoelectric converter (10A) is irradiated with light and the photoelectric converter (10A) is saturated with electrons and holes.