Pixel Charge-Transport Architecture for Fast ToF Charge Transfer

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Solution Overview

Problem

Existing pixel architectures for high-speed imaging, such as those used in time-of-flight applications, face challenges in achieving fast charge transfer due to limitations in electric field control and speed of charge collection, requiring precise manufacturing controls and limited electric field strength.

Innovation Solution

A pixel architecture with a semiconductor charge-transport layer and doped regions, featuring a bias region and transfer gates, allows for dynamic control of charge transfer in both vertical and lateral directions, enabling rapid collection and transfer of charges through a terrace-type structure and potential pockets, avoiding the need for precise manufacturing controls.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a constant electric field distribution is achieved by controlling surface-buried region width or impurity concentration, then charge transfer speed is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvecharge transfer speedVSAvoidcontrol of surface-buried region width or impurity concentration
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The charge-transport layer is divided into multiple doped regions with different doping types and concentrations, creating segmented potential pockets that guide charge transfer. This segmentation allows flexible control of electric fields without requiring precise control of a single continuous region, thereby reducing manufacturing precision requirements while maintaining fast charge transfer.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces transfer gates that can dynamically adjust the electric field distribution and charge transfer paths. By making the electric field configuration adjustable and dynamic rather than fixed, the system can optimize charge transfer speed without being constrained by fixed manufacturing tolerances for region dimensions or impurity concentrations.

Inventive Principle:
Principle #15Dynamics

2Productivity

If electric field strength is increased to improve charge collection speed, then charge collection efficiency is improved, but device complexity increases

Engineering Contradiction:
Improvecharge collection speedVSAvoidelectric field control structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

Different doped regions are created with specific local properties (different doping types and concentrations) to generate appropriate electric fields in specific areas. This local quality approach allows strong electric fields to be concentrated where needed for fast charge collection, while avoiding the need for uniformly complex structures throughout the entire device.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

Transfer gates serve as intermediary elements that mediate between the light-receiving surface and charge storage regions. These gates provide a controlled interface for charge transfer, enabling efficient charge collection without requiring direct complex electric field control across the entire pixel structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Speed

If charges are transferred quickly through the pixel, then imaging speed is improved, but charge trapping risk increases

Engineering Contradiction:
Improvecharge transfer speedVSAvoidcharge transfer reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

Multiple doped regions are arranged to create continuous potential gradients that guide charges smoothly through the charge-transport layer. This continuous guidance structure ensures that charges are constantly directed toward their destination without interruption or stagnation, maintaining both fast transfer speed and high reliability by preventing charge trapping in intermediate regions.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The transfer gates can be dynamically controlled based on the imaging phase, providing feedback-based adjustment of charge transfer timing and paths. This allows the system to optimize charge transfer in real-time, ensuring fast transfer while maintaining reliability by adapting to actual charge generation and transfer conditions.

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This architecture facilitates high-speed charge transfer, suitable for high-speed imaging applications like time-of-flight sensing, by ensuring efficient collection and transfer of charges, reducing the risk of charge trapping and improving signal-to-noise ratio.

Implementation Method 1

an absorption layer, which is configured to extend in a first plane, the absorption layer being configured for back-side illumination and being configured to generate charges in response to incident light

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Implementation Method 2

the doped regions and the bias region are differently biased for driving transport of the generated charges towards the charge-dispatch region

Methodology Applied
Scientific EffectElectric field: Electric Field

Data Source

PatentEP3598498B1A pixel architecture and an image sensor
Publication Date: 2023.08.30 INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW)
  • EP3598498B1 patent drawingFigure 1~2
  • EP3598498B1 patent drawingFigure 3~4
  • EP3598498B1 patent drawingFigure 5~6

AI summary

A pixel architecture comprises: an absorption layer (112), which is configured to generate charges in response to incident light; a semiconductor charge-transport layer (118), which is configured to transport the generated charges through the charge-transport layer (118), wherein one or more doped regions (122) are arranged in the charge-transport layer (118), wherein said charge-transport layer comprises a bias region (121) and a charge-dispatch region (120) being associated with the bias region (121); an electric connection (132) connecting to and providing a selectable bias voltage to the bias region (121); and at least one transfer gate (124, 126), wherein the doped regions (122) and the bias region (121) are differently biased for driving transport of the generated charges towards the charge-dispatch region (120), and for controlling, together with the at least one transfer gate (124, 126), transfer of charges from the charge-dispatch region (120) to a charge node (128, 130).