Pixel Comparator Capacitor Network for Inversion Timing Accuracy
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Solution Overview
Problem
In imaging devices with column-parallel analog-to-digital converters, the comparator's inversion timing error due to varying drain voltage of P-channel MOS transistors leads to errors and nonlinearity in digital signals, deteriorating image quality.
Innovation Solution
The imaging device incorporates a comparator configuration with a load current source, an input transistor connected between the load current source and a signal line, a first capacitor for inputting a reference signal to the input transistor's gate, and a second capacitor connected between the gate and a reference potential node, using capacitive voltage division to attenuate the reference signal and reduce noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the comparator shares the load current source of the pixel circuit, then power consumption is reduced, but the drain voltage of the P-channel MOS transistor varies depending on the pixel signal level, causing inversion timing error
Solution Approach 1:
An N-channel MOS transistor is introduced as an intermediary between the P-channel input transistor and the load current source. This N-channel transistor acts as a voltage buffer that isolates the P-channel transistor from voltage variations, maintaining stable gate-source voltage for accurate comparison timing while allowing current sharing for low power consumption.
Solution Approach 2:
The comparator is divided into two independent current paths: one for the input transistor (providing stable gate-source voltage for accurate timing) and one for the load current source (enabling power saving through sharing). This segmentation allows each part to optimize its function without interfering with the other.
2Device complexity
If the drain voltage of the P-channel MOS transistor varies with pixel signal level, then the configuration is simple and shares current source, but the inversion timing deviates from the ideal timing when pixel signal matches reference signal
Solution Approach 1:
The N-channel MOS transistor serves as a voltage buffer that decouples the drain voltage variations from the P-channel input transistor. This intermediary maintains constant gate-source voltage across different signal levels, ensuring inversion occurs at the correct timing without adding significant complexity to the overall comparator structure.
3Measurement precision
If a separate current source is provided in the comparator, then inversion timing accuracy is improved, but power consumption increases
Solution Approach 1:
The current supply is segmented into two independent paths: one path supplies the input transistor with stable voltage for accurate timing, while the other path allows the load current source to be shared with the pixel circuit for power saving. This segmentation achieves both accuracy and efficiency without requiring a completely separate current source.
Solution Approach 2:
The N-channel MOS transistor acts as a mediator that enables the P-channel input transistor to maintain stable operating conditions (like having a separate current source) while actually sharing the load current source with the pixel circuit, thus achieving both accuracy and low power consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses the inversion timing error of the comparator, reducing errors and nonlinearity in digital signals and thereby improving image quality while also reducing power consumption.
Implementation Method 1
a first capacitor 51 that inputs a predetermined reference signal to a gate electrode of the input transistor PT11; and a second capacitor 52 connected between the gate electrode of the input transistor PT11 and a reference potential node
Data Source
AI summary
Provided are an imaging device capable of suppressing an error in inversion timing of a comparison result when an analog pixel signal is compared with a predetermined reference signal, and an electronic apparatus including the imaging device. An imaging device of the present disclosure includes: a load current source; a comparator that has an input transistor connected between the load current source and a signal line transmitting a signal read from a pixel; a first capacitor that inputs a predetermined reference signal to a gate electrode of the input transistor; and a second capacitor connected between the gate electrode of the input transistor and a reference potential node. Furthermore, an electronic apparatus of the present disclosure includes the imaging device having the above-described configuration.