Pixel Electrode Contact Layout for Mask-Shift-Tolerant Displays

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Solution Overview

Problem

Existing transparent displays face challenges in maintaining consistent contact resistance between pixel electrodes and drain electrodes due to mask shift during contact hole formation, leading to variations in display quality.

Innovation Solution

The display device incorporates a specific arrangement of contact holes in insulating films, where the symmetry axes of contact holes are intentionally displaced to ensure consistent contact area between the pixel electrode and the drain electrode, thereby stabilizing the contact resistance across pixels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional contact hole formation is used, then manufacturing process is simple, but mask shift causes variations in contact area and contact resistance

Engineering Contradiction:
Improvecontact area consistencyVSAvoidcontact hole arrangement
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies asymmetry by intentionally designing the contact holes in the second insulating film to be positioned asymmetrically relative to the contact holes in the first insulating film. Specifically, the contact holes are arranged at different locations such that when viewed from above, they do not align vertically, creating an asymmetric configuration that compensates for mask shift effects during manufacturing.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent implements local quality by varying the positions of contact holes in different regions of the insulating films. The contact holes are strategically placed at specific locations within the pixel electrode and drain electrode regions to ensure that the overall contact area remains consistent even when mask alignment varies during the formation process.

Inventive Principle:
Principle #3Local quality

2Reliability

If contact holes are arranged to compensate mask shift, then contact resistance variation is suppressed, but manufacturing complexity increases

Engineering Contradiction:
Improvecontact resistance stabilityVSAvoidcontact hole formation
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The asymmetric arrangement of contact holes between the first and second insulating films is designed to inherently compensate for mask shift. By positioning contact holes at different locations in each film layer, the design ensures that even if the mask shifts during fabrication, the cumulative contact area between the pixel electrode and drain electrode remains relatively constant, thereby maintaining reliable electrical connection.

Inventive Principle:
Principle #4Asymmetry

3Manufacturing precision

If symmetric contact hole arrangement is used, then manufacturing is easier, but mask shift causes contact area variation affecting display quality

Engineering Contradiction:
Improvecontact area consistencyVSAvoidcontact hole arrangement
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent deliberately employs asymmetric positioning of contact holes in the second insulating film relative to those in the first insulating film. This asymmetric configuration is specifically designed to counteract the effects of mask shift, ensuring that variations in mask alignment during manufacturing do not result in significant changes in the total contact area between electrodes.

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentUS20240248356A1Display device
Publication Date: 2024.07.25 JAPAN DISPLAY INC
  • US20240248356A1 patent drawing
  • US20240248356A1 patent drawing
  • US20240248356A1 patent drawing

AI summary

A display device includes a transistor having an oxide semiconductor layer, a gate electrode opposed to the semiconductor layer, and a gate insulating film arranged between the oxide semiconductor layer and the gate electrode, a drain electrode connected to the transistor, a pixel electrode connected to the drain electrode, and a first insulating film and a second insulating film arranged between the drain electrode and the pixel electrode.