3D Pixel Transistor Gate Layout for Higher Image Sensor Fill Factor
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Solution Overview
Problem
Conventional image sensor devices have a reduced fill factor due to laterally extending pixel transistors, which limits the area available for photodiodes, thereby decreasing quantum efficiency and overall performance.
Innovation Solution
The image sensor device incorporates pixel transistors with gate features that partially extend into the semiconductor substrate, reducing the lateral distance and allowing more photodiodes to be disposed over a given chip area, thereby increasing the fill factor and improving quantum efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If pixel transistors are formed with laterally extending gate features along the major surface, then the device structure is simple and fabrication is easier, but the fill factor is reduced and quantum efficiency decreases
Solution Approach 1:
The gate feature is extended from a purely lateral configuration along the major surface into the substrate vertically, creating a three-dimensional structure. This dimensional transition allows the gate to occupy less lateral space while maintaining its functional length, thereby increasing the fill factor and quantum efficiency without complicating the fabrication process
2Device complexity
If pixel transistors are formed with laterally extending gate features, then fabrication process is conventional and simpler, but the chip area available for photodiodes is significantly reduced
Solution Approach 1:
By extending the gate feature vertically into the substrate rather than solely laterally along the surface, the design utilizes the third dimension to accommodate the gate structure. This reduces the lateral footprint of the transistor, freeing up chip area for additional photodiodes while maintaining device functionality and keeping the fabrication process relatively conventional
3Device complexity
If gate features extend laterally along the major surface, then the transistor structure is conventional, but the fill factor is reduced and quantum efficiency is decreased
Solution Approach 1:
The gate feature is configured to extend from the major surface into the substrate vertically, creating a three-dimensional structure that reduces lateral occupation. This dimensional change increases the fill factor, allowing more photodiode area to detect incident light, thereby improving quantum efficiency and overall device reliability while maintaining a relatively simple fabrication approach
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design significantly enhances the performance of the image sensor device by increasing the fill factor and quantum efficiency while maintaining the same chip area, improving the detection and conversion of incident light into electrical signals.
Implementation Method 1
Each pixel includes at least one photosensitive diode (hereinafter 'photodiode') configured to detect the incident light and convert the detected incident light into an electrical signal (e.g., a photocurrent/current signal)
Data Source
AI summary
A semiconductor device includes: a photodiode formed in a substrate; and at least one transistor having a gate feature that comprises a first portion and a second portion coupled to an end of the first portion, the first portion disposed above and extending along a major surface of the substrate and the second portion extending from the major surface of the substrate into the substrate, wherein the photodiode and the at least one transistor at least partially form a pixel.