Pixel Isolation Layout for Dense CMOS Image Sensors
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Solution Overview
Problem
Current CMOS image sensors face challenges in minimizing cross-talk between pixels and maintaining gate electrode size as integration density increases, leading to potential deterioration in image sensor performance.
Innovation Solution
The implementation of a deep device isolation pattern with specific portions spaced apart in different directions between pixel regions, along with extended active patterns, helps minimize cross-talk and allows for increased gate electrode size, thereby enhancing integration density without reducing gate electrode performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If integration density is increased, then the number of pixels per unit area increases, but cross-talk between adjacent pixels increases and gate electrode size decreases
Solution Approach 1:
The deep device isolation pattern is divided into multiple discrete portions (first portions and second portions) that are spatially separated. These segmented isolation structures are positioned at specific locations between adjacent pixel regions, creating localized barriers that effectively block cross-talk without requiring continuous isolation material that would consume excessive space and reduce gate electrode dimensions.
Solution Approach 2:
The isolation structure employs different configurations in different spatial locations: first portions are positioned between pixels in the first direction, while second portions are positioned between pixels in the second direction. This local differentiation optimizes cross-talk suppression for each specific pixel interface while maximizing the available space for gate electrodes in other regions.
2Productivity
If integration density is increased, then more pixels fit in the same area, but gate electrode size decreases leading to performance deterioration
Solution Approach 1:
The isolation pattern is segmented into discrete first portions and second portions rather than using a continuous isolation structure. This segmentation creates isolated barrier regions that suppress cross-talk while leaving the spaces between these discrete portions available for extending gate electrodes, thereby maintaining larger gate electrode sizes even as integration density increases.
Solution Approach 2:
The isolation structure extends in the depth dimension (third direction perpendicular to substrate) rather than only in the planar dimensions. By positioning isolation portions at different depths and using vertical sidewalls, the patent achieves effective cross-talk suppression through three-dimensional spatial arrangement, freeing up planar space for larger gate electrodes.
Data Source
AI summary
An image sensor includes a substrate having a plurality of pixel regions and a deep device isolation pattern disposed in the substrate between the pixel regions. The pixel regions include first, second, third, and fourth pixel regions, which are adjacent to each other in first and second directions. The deep device isolation pattern includes first portions interposed between the first and second pixel regions and between the third and fourth pixel regions and spaced apart from each other in the second direction, and second portions interposed between the first and third pixel regions and between the second and fourth pixel regions and spaced apart from each other in the first direction. The first pixel region includes a first extended active pattern, which is extended to the second pixel region in the first direction and is disposed between the first portions of the deep device isolation pattern.