Pixel Isolation Layout for Crack-Resistant Semiconductor Substrates

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Solution Overview

Problem

Semiconductor substrates near pixel isolation portions experience strong internal stresses, leading to crack formation between front surface-side and rear surface-side pixel isolation portions, which can cause functional problems in semiconductor devices.

Innovation Solution

The semiconductor device incorporates a plurality of first and second pixel isolation portions with insulators, where the second pixel isolation portions form rear surface spacing extension portions with varying distances and depths to reduce stress concentrations and prevent line-shaped cracks, and a manufacturing method involving oxide film layers and resist patterns to form these isolation portions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If front surface-side and rear surface-side pixel isolation portions are provided in close proximity, then pixel isolation effectiveness is improved, but crack formation in the substrate increases

Engineering Contradiction:
Improvepixel isolation effectivenessVSAvoidsubstrate crack resistance
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent applies local quality by varying the depth of rear surface spacing extension portions across different locations. Specifically, some portions extend deeper toward the front surface while others extend shallower, creating locally optimized stress distribution. This non-uniform depth configuration reduces concentrated internal stresses in the substrate while maintaining effective pixel isolation, thereby preventing crack formation without sacrificing isolation performance.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent implements parameter changes by modifying the depth parameter of rear surface spacing extension portions. By changing the extension depth from uniform to variable (with at least two different depth values), the internal stress distribution in the substrate is altered. This parameter variation prevents stress concentration that would otherwise lead to crack formation, while still maintaining the isolation function between pixels.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If pixel isolation portions are provided to prevent leakage current, then electrical isolation is improved, but internal stress concentration increases

Engineering Contradiction:
Improveelectrical isolationVSAvoidinternal stress concentration
Core Design Contradiction:
ReliabilityVSStress or pressure

Solution Approach 1:

The patent addresses stress concentration by introducing local quality variations in the rear surface spacing extension portions. Different portions extend to different depths, creating localized stress relief zones. This allows the isolation structure to maintain electrical isolation functionality while distributing internal stresses more evenly across the substrate, preventing excessive stress concentration at any single location.

Inventive Principle:
Principle #3Local quality

3Strength

If rear surface spacing extension portions are made deeper, then crack prevention is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvecrack preventionVSAvoidisolation structure complexity
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The patent reduces unnecessary complexity by applying local quality only where needed. Rather than making all rear surface spacing extension portions uniformly deep (which would increase overall complexity), only specific portions are extended deeper while others remain at standard depth. This targeted approach provides crack prevention where necessary while maintaining simpler structures elsewhere, optimizing the balance between crack prevention and manufacturing complexity.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20250015115A1Semiconductor device and semiconductor device manufacturing method
Publication Date: 2025.01.09 SONY SEMICON SOLUTIONS CORP
  • US20250015115A1 patent drawing
  • US20250015115A1 patent drawing
  • US20250015115A1 patent drawing

AI summary

[Problem] Provided is a technique useful for reducing functional problems in a semiconductor device caused by cracks which may form in a semiconductor substrate. [Solution] A semiconductor device includes: a plurality of first pixel isolation portions, each extending from a front surface of a substrate toward a rear surface of the substrate, and each having an insulator; and a plurality of second pixel isolation portions, each extending from the rear surface of the substrate toward the front surface of the substrate, and each having an insulator. In one cross-section of the substrate, the plurality of second pixel isolation portions form a plurality of rear surface spacing extension portions which are isolated from each other and which extend locally from the rear surface of the substrate toward the front surface of the substrate. A distance between one or more of the plurality of rear surface spacing extension portions and the front surface of the substrate is different from a distance between another one or more of the plurality of rear surface spacing extension portions and the front surface of the substrate.