Dual Switching Element Pixel Layout for Kickback Voltage Uniformity
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Solution Overview
Problem
Display devices face issues with a significant difference in kickback voltage between sub-pixels, leading to mura defects due to luminance differences, which existing technologies have not adequately addressed.
Innovation Solution
The design includes a display device with a specific configuration of gate and drain electrodes, where the capacitance of the first and second gate-drain capacitors is controlled by adjusting the overlapping areas, and the use of contact holes and conductive patterns to improve the aperture ratio and reduce the difference in kickback voltage between sub-pixel areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the overlapping area of gate electrode and drain electrode is increased to increase gate-drain capacitor capacitance, then kickback voltage difference between sub-pixels is reduced, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent applies local quality by making the overlapping area between gate electrode and drain electrode non-uniform across different sub-pixels. Specifically, the first gate-drain capacitor is designed with a larger overlapping area than the second gate-drain capacitor, creating deliberate local variations in capacitance values to compensate for kickback voltage differences between sub-pixels of different colors.
Solution Approach 2:
The patent changes the physical parameter of overlapping area to adjust capacitance values. By controlling the overlapping area between gate electrode and drain electrode, the capacitance of gate-drain capacitors is precisely adjusted to achieve uniform kickback voltage across sub-pixels of different colors, thereby resolving the technical contradiction.
2Productivity
If contact holes are positioned to overlap with via holes of color filter to improve aperture ratio, then light transmission efficiency increases, but manufacturing precision requirements increase
Solution Approach 1:
The patent merges the positioning of contact holes with via holes of the color filter layer. By making contact holes overlap with via holes, the patent simultaneously achieves two functions: improving aperture ratio by reducing the number of separate openings needed, and simplifying manufacturing by aligning features that can be formed in the same process step.
3Adaptability or versatility
If switching elements are spaced apart to enable flexible pixel design, then design freedom increases, but area occupied by switching elements increases
Solution Approach 1:
The patent utilizes spatial arrangement in different dimensions by spacing switching elements apart in the planar layout while maintaining compact vertical stacking. This allows flexible pixel design and independent optimization of each switching element while controlling the overall area occupation through efficient vertical integration of device layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces the range of kickback voltage differences between sub-pixel areas, thereby suppressing mura defects and enhancing the display quality by maintaining consistent luminance across the display device.
Implementation Method 1
a first gate electrode overlapping a first drain electrode, and a second gate electrode overlapping a second drain electrode, wherein a capacitance of the first gate-drain capacitor is different from a capacitance of the second gate-drain capacitor
Data Source
AI summary
A display device includes a gate line extended in a first direction and a data line extended in a second direction crossing the first direction; a first switching element including a first source electrode connected to the data line, a first drain electrode, and a first gate electrode connected to the gate line; and a second switching element including a second source electrode connected to the data line, a second drain electrode, and a second gate electrode connected to the gate line. A region of the first drain electrode overlapping the first gate electrode extends in the second direction, the second source electrode is extended in the second direction, and is parallel with the first and second drain electrodes. A region of the second drain electrode overlapping the second gate electrode includes a first region extended in the first direction and a second region extended in the second direction.