Pixel Output Line Layout for Low-Crosstalk Solid-State Imaging

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Solid-state imaging elements experience reduced image quality due to crosstalk between adjacent pixel output lines, which occurs when the number of pixel output lines is increased, leading to capacitance coupling and parasitic capacitances.

Innovation Solution

The solution involves arranging pixel output lines in a manner where the closest pixel output lines to each other are connected to pixels in the same row, allowing them to read out signals from adjacent pixels that are close to each other, thereby reducing crosstalk and image quality issues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the number of pixel output lines is increased to read out pixel signals at higher rates, then productivity is improved, but crosstalk and capacitance coupling between adjacent pixel output lines worsen, degrading image quality

Engineering Contradiction:
Improvepixel signal readout rateVSAvoidcrosstalk between pixel output lines
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by pre-arranging the connection relationships between pixel output lines and pixels before signal readout occurs. Specifically, the first closest pixel output line is connected to a first pixel, and the second closest pixel output line is connected to a second pixel in the same pixel row, establishing an optimal configuration that prevents crosstalk issues before they can affect image quality

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies local quality by making the connection arrangement specific to the spatial relationship between adjacent pixel columns. The first pixel and second pixel are both located in the same pixel row, creating a localized optimal connection pattern for the region where crosstalk is most likely to occur between the first closest and second closest pixel output lines

Inventive Principle:
Principle #3Local quality

2Device complexity

If pixel output lines are arranged with small intervals to increase density, then device complexity is reduced, but parasitic capacitances increase, degrading image quality

Engineering Contradiction:
Improvewiring layer complexityVSAvoidparasitic capacitances
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by pre-arranging the connection relationships between pixel output lines and pixels before signal readout occurs. Specifically, the first closest pixel output line is connected to a first pixel, and the second closest pixel output line is connected to a second pixel in the same pixel row, establishing an optimal configuration that prevents crosstalk issues before they can affect image quality

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies local quality by making the connection arrangement specific to the spatial relationship between adjacent pixel columns. The first pixel and second pixel are both located in the same pixel row, creating a localized optimal connection pattern for the region where crosstalk is most likely to occur between the first closest and second closest pixel output lines

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20240178243A1Solid-state imaging element
Publication Date: 2024.05.30 SHARP SEMICON INNOVATION CORP TENRI CITY
  • US20240178243A1 patent drawing
  • US20240178243A1 patent drawing
  • US20240178243A1 patent drawing

AI summary

A solid-state imaging element includes: a plurality of first pixel output lines connected respectively to the plurality of first pixels; and a plurality of second pixel output lines connected respectively to the plurality of second pixels, wherein the plurality of first pixel output lines include a first closest pixel output line located closest to the plurality of second pixel output lines, the plurality of second pixel output lines include a second closest pixel output line located closest to the plurality of first pixel output lines, the first closest pixel output line is connected to a first pixel included in the plurality of first pixels, and the second closest pixel output line is connected to a second pixel included in the plurality of second pixels and disposed in the same pixel row as a pixel row that includes the first pixel.