Pixel MIM Capacitor Layout for Higher Sensitivity Without Larger Pixels
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In semiconductor devices, increasing the capacitance of capacitive elements to enhance sensitivity often results in larger pixel sizes, which reduces resolution and increases fabrication difficulties, especially when using trench-type capacitors.
Innovation Solution
The implementation of a metal-insulator-metal (MIM) capacitor within the pixel, utilizing a metal light shield layer to prevent light-induced malfunctions and shield the reading circuit, allowing for increased capacitance without expanding the pixel size by forming the capacitor in regions apart from the photodiode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the capacitance of capacitive elements is increased to enhance sensitivity, then the sensitivity is improved, but the pixel size is enlarged
Solution Approach 1:
The patent transitions from planar capacitor structures to three-dimensional stacked capacitor structures, utilizing the vertical dimension (stacking multiple capacitor layers) to increase capacitance without expanding the horizontal pixel area. This allows higher sensitivity while maintaining compact pixel size.
Solution Approach 2:
The patent embeds multiple capacitor structures within the pixel region by stacking them vertically, similar to nested dolls. The capacitors are integrated into the existing pixel architecture, nesting additional functional elements within the same spatial footprint to increase total capacitance without enlarging the pixel.
2Measurement precision
If trench-type capacitors are used to increase capacitance, then the capacitance is improved, but the fabrication complexity and difficulty are increased
Solution Approach 1:
The patent extracts the complex trench formation process and replaces it with simpler planar or stacked capacitor structures that can be formed using standard semiconductor fabrication processes. This eliminates the need for deep trench etching and complex filling operations, significantly reducing fabrication complexity while maintaining or improving capacitance.
Solution Approach 2:
The patent changes the structural parameters of the capacitor from three-dimensional trenches to planar or vertically-stacked configurations. This parameter change transforms the fabrication process from complex trench formation to simpler deposition and patterning steps, reducing manufacturing difficulty while achieving the required capacitance values.
3Reliability
If a light shield metal is formed at the uppermost layer to prevent light-induced malfunction, then the reliability is improved, but the pixel size is enlarged due to additional wiring regions
Solution Approach 1:
The patent makes the light shield layer serve multiple functions: it acts as both a light-blocking structure to prevent transistor malfunction and as an electrode for the capacitor structure. This multi-functionality eliminates the need for separate light shield metal and capacitor electrode structures, reducing the overall pixel area while maintaining reliability.
Solution Approach 2:
The patent merges the light shield function with the capacitor electrode function into a single integrated structure. The metal layer that would traditionally serve only as a light shield is combined with the capacitor's upper electrode, eliminating redundant structures and reducing pixel size while achieving both light protection and capacitance enhancement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables increased capacitance without enlarging pixel size, thereby maintaining or improving resolution and reducing fabrication complexities associated with trench-type capacitors.
Implementation Method 1
light is received at a photodiode and photoelectrically converted
Data Source
AI summary
A pixel 10 is provided with a lower metal electrode 41, an upper metal electrode 43, a capacitor insulation layer 42, contacts 44 and 45 and a contact 46. The lower metal electrode 41, upper metal electrode 43 and capacitor insulation layer 42 are formed on a semiconductor substrate 21, are clear of a region in which a photodiode 11 is formed, and are formed at a region in which a reading circuit 13 is formed. At least the contacts 44 and 45 electrically connect the lower metal electrode 41 with a metal wire 40, and at least the contact 46 electrically connects the upper metal electrode 43 with the metal wire 40.