Pixel Structure Fabrication Using Merged Mask Patterning
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Solution Overview
Problem
The conventional pixel structure fabrication process requires a six mask process, leading to high costs and mis-alignment issues between the semiconductor layer and the etching stop pattern, which complicates the manufacturing process.
Innovation Solution
A method that uses the same mask process to pattern the semiconductor layer and the second metal layer, eliminating the need for additional masks and ensuring proper alignment by forming an etching stop pattern above the gate, and using photoresist patterns with varying thickness and light transmittance to achieve precise patterning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a six mask process is used to fabricate the pixel structure with an etching stop pattern, then the semiconductor layer can be protected during etching, but the manufacturing cost increases and mis-alignment occurs between the semiconductor layer and the etching stop pattern
Solution Approach 1:
The patent combines the etching stop pattern formation with the semiconductor layer patterning by using the same mask for both operations. The mask simultaneously defines the semiconductor layer pattern and the etching stop pattern, eliminating the need for a separate mask process and reducing the total number of masks from six to five.
Solution Approach 2:
The mask serves multiple functions: it patterns the semiconductor layer, defines the etching stop pattern, and protects the semiconductor layer during subsequent etching processes. By making the mask universal for multiple purposes, the patent eliminates redundant masking steps and reduces overall process complexity.
2Reliability
If additional masks are added to protect the semiconductor layer, then the etching stop effect is achieved, but the manufacturing cost increases
Solution Approach 1:
The patent merges the etching stop pattern formation with the semiconductor layer patterning in a single mask step. The same mask that patterns the semiconductor layer also creates the etching stop pattern, eliminating the need for additional masks and reducing manufacturing costs associated with extra masking materials and processing steps.
Solution Approach 2:
The semiconductor layer pattern itself serves as the etching stop pattern by using the same mask definition. The patterned semiconductor layer automatically provides the etching stop function during subsequent processing, eliminating the need for separate protective structures and reducing manufacturing complexity.
3Reliability
If separate mask processes are used for the semiconductor layer and etching stop pattern, then the etching stop pattern can be formed, but mis-alalignment occurs between the two layers
Solution Approach 1:
The patent combines the patterning of the semiconductor layer and the etching stop pattern into a single mask operation. Since both patterns are defined by the same mask in the same process step, perfect alignment is achieved without the misalignment issues that arise from sequential masking operations.
Solution Approach 2:
The etching stop pattern is formed simultaneously with the semiconductor layer pattern rather than in a separate subsequent step. This preliminary action ensures that the etching stop pattern is already in perfect registration with the semiconductor layer before any etching operations begin, eliminating alignment errors.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the fabrication process to a five mask process, improves alignment, and reduces parasitic capacitances by increasing the gap between electrodes, thereby enhancing the fabrication yield and reducing costs.
Implementation Method 1
a first photoresist pattern and a second photoresist pattern are formed by a photolithography process using a mask, wherein a light transmittance of the mask in a first region corresponds to a thickness of the first photoresist pattern and a light transmittance of the mask in a second region corresponds to a thickness of the second photoresist pattern
Data Source
AI summary
A fabrication method of a pixel structure and a pixel structure are provided. A first patterned metal layer including scan lines and a gate is formed on a substrate. A first insulation layer, a semiconductor layer, an etching stop pattern and a metal layer are formed sequentially on the first patterned metal layer. The metal layer and the semiconductor layer are patterned to form a second patterned metal layer and a patterned semiconductor layer. The second patterned metal layer includes data lines, a source and a drain. The patterned semiconductor layer includes a first semiconductor pattern completely overlapping the second patterned metal layer and a second semiconductor pattern without overlapping the second patterned metal layer, wherein the second semiconductor pattern includes a channel pattern and a marginal pattern. The channel pattern is between the source and the drain and the marginal pattern surrounds the first semiconductor pattern.