Pixel Structure Stacked Storage Capacitor Aperture Ratio

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The challenge in flat panel display technology is to increase the capacitance value of storage capacitors while maintaining a good aperture ratio, as insufficient storage capacitance can lead to abnormal display due to lower operation voltage, and increasing the area of storage capacitor electrodes made of non-transparent materials reduces the brightness and aperture ratio.

Innovation Solution

A pixel structure is designed with a metal oxide semiconductor layer, insulating layers, conductive layers, and a passivation layer, where multiple electrodes or conductive patterns are stacked to form storage capacitors, effectively increasing capacitance without compromising the aperture ratio by overlapping conductive elements to form sub-storage capacitors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the area of storage capacitor electrodes is increased to ensure sufficient capacitance value, then the storage capacitance is improved, but the aperture ratio of the pixel electrode becomes smaller and display quality deteriorates

Engineering Contradiction:
Improvestorage capacitanceVSAvoidaperture ratio
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent transitions from a planar electrode layout to a three-dimensional stacked structure by forming multiple insulating layers with capacitance dielectric patterns at different levels. This vertical stacking enables the storage capacitor to achieve sufficient capacitance through increased effective area in the vertical dimension rather than expanding horizontally, thereby preserving the aperture ratio of the pixel electrode.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements a nested structure where multiple capacitance dielectric patterns are embedded within stacked insulating layers. The first and second insulating layers each contain capacitance dielectric patterns that are vertically aligned and electrically connected, creating a nested configuration that multiplies the effective capacitance area without increasing the horizontal footprint.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If non-transparent materials are used for storage capacitor electrodes to ensure sufficient capacitance, then the storage capacitance is improved, but the brightness of the flat panel display decreases

Engineering Contradiction:
Improvestorage capacitanceVSAvoidbrightness
Core Design Contradiction:
ReliabilityVSIllumination intensity

Solution Approach 1:

The patent applies different material properties to different regions: transparent or light-transmissive materials are used for the capacitance dielectric patterns in the stacked insulating layers, while non-transparent materials are reserved for the pixel electrode and other functional regions. This localized material selection allows the storage capacitor to maintain sufficient capacitance without blocking light, thereby preserving display brightness.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9728592B2Pixel structure
Publication Date: 2017.08.08 AU OPTRONICS CORP
  • US9728592B2 patent drawing
  • US9728592B2 patent drawing
  • US9728592B2 patent drawing

AI summary

A pixel structure includes a metal oxide semiconductor layer, a first insulating layer, a second insulating layer, a first conductive layer, a passivation layer, a second conductive layer and a pixel electrode. The metal oxide semiconductor layer includes a second semiconductor pattern. The first insulating layer includes a first capacitance dielectric pattern disposed on the second semiconductor pattern. The second insulating layer includes a second capacitance dielectric pattern disposed on the first capacitance dielectric pattern. The first conductive layer includes a electrode pattern disposed on the second capacitance dielectric pattern. The passivation layer covers the first conductive layer. The second conductive layer includes a second electrode disposed on the passivation layer. The second electrode is electrically connected to the second semiconductor pattern. The second electrode is disposed to overlap the electrode pattern. The second semiconductor pattern, the electrode pattern and the second electrode form a storage capacitor.