Pixel Structure Vertical Storage Capacitor Aperture Ratio

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Solution Overview

Problem

Conventional pixel structures face issues with short-circuiting during manufacturing and reduced aperture ratio due to the design of storage capacitors, which affects the brightness and resolution of display panels.

Innovation Solution

A method for forming a pixel structure that includes a storage capacitor formed by a third conductive layer, a passivation layer, and a second conductive layer, which allows for increased aperture ratio without altering the storage capacitance, using conductive materials such as transparent or reflective materials or their combinations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the passivation layer is made thicker to prevent short-circuiting, then the reliability improves, but the storage capacitor capacitance decreases

Engineering Contradiction:
Improveshort-circuit preventionVSAvoidstorage capacitor capacitance
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The invention moves the storage capacitor from the planar XY plane to the Z-axis vertical dimension by forming the capacitor between the pixel electrode and the lower surface of the color filter substrate. This three-dimensional configuration allows the capacitor to occupy vertical space rather than horizontal space, preventing interference with the passivation layer thickness while maintaining sufficient capacitance value.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If the storage capacitor area is increased to maintain capacitance, then the reliability improves, but the aperture ratio decreases

Engineering Contradiction:
Improvestorage capacitanceVSAvoidaperture ratio
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

The storage capacitor is repositioned to the color filter substrate's lower surface, utilizing the Z-axis dimension rather than the XY plane. This vertical placement removes the capacitor from the visible display area, allowing the aperture ratio to be maximized while the capacitor area can be sufficiently large for maintaining required capacitance without affecting brightness.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The storage capacitor is nested within the color filter substrate structure itself, using the substrate's thickness and lower surface as part of the capacitor configuration. This nesting approach allows the capacitor to be integrated into the existing device architecture without occupying additional visible area, thereby preserving the aperture ratio.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Reliability

If the capacitance electrode is made of non-transparent material to increase storage capacity, then the reliability improves, but the brightness decreases

Engineering Contradiction:
Improvestorage capacitor stabilityVSAvoidpanel brightness
Core Design Contradiction:
ReliabilityVSIllumination intensity

Solution Approach 1:

The capacitance electrode is relocated to the lower surface of the color filter substrate, positioning it in the Z-axis dimension behind the display structure. This placement allows the electrode to use non-transparent materials for stable capacitance without blocking light in the visible area, as it now resides in a non-visible position relative to the display output.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS8263445B2Pixel structure and method for forming the same
Publication Date: 2012.09.11 AU OPTRONICS CORP
  • US8263445B2 patent drawing
  • US8263445B2 patent drawing
  • US8263445B2 patent drawing

AI summary

A pixel structure comprising at least one transistor, a first storage capacitor, a first conductive layer, an interlayer dielectric layer, a second conductive layer, a passivation layer, and a third conductive layer is provided. The first storage capacitor is electrically connected to the transistor. The interlayer dielectric layer having at least one first opening covers the first conductive layer. The second conductive layer is formed on a part of the interlayer dielectric layer and is electrically connected to the first conductive layer through the first opening. The passivation layer having at least one second opening covers the transistor and the second conductive layer. The third conductive layer is formed on a part of the passivation layer and is electrically connected to the transistor through the second opening. The first storage capacitor is formed by the third conductive layer, the passivation layer, and the second conductive layer.