Planar Engine Circuit for Neural Processor Data Processing
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Solution Overview
Problem
Existing neural network processing systems rely heavily on central processing units (CPUs), leading to significant bandwidth consumption and increased power usage due to the need for extensive computing operations, particularly in machine learning tasks like convolutional neural networks (CNNs).
Innovation Solution
A neural processor is designed with a plurality of neural engine circuits and a planar engine circuit, where the planar engine efficiently performs operations such as elementwise operations and data processing by storing data in a compact format, reducing the number of operating cycles and offloading resource-intensive tasks from the CPU.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a CPU is used to perform neural network operations, then ease of operation is improved, but power consumption increases
Solution Approach 1:
The patent replaces the general-purpose CPU (mechanical/electronic system) with a specialized neural processor that uses dedicated hardware circuits (neural engines and planar engine) to perform neural network operations. This substitution reduces power consumption by eliminating the overhead of general-purpose processing while maintaining ease of operation through hardware acceleration.
2Ease of operation
If a CPU is used to perform neural network operations, then ease of operation is improved, but bandwidth consumption increases
Solution Approach 1:
The patent replaces CPU-based processing with a dedicated neural processor that performs computations locally using specialized hardware. This eliminates the need for continuous data transfer between CPU and memory, thereby reducing bandwidth consumption while maintaining operational simplicity.
3Productivity
If data is stored in a compact format, then productivity is improved, but device complexity increases
Solution Approach 1:
The patent changes the storage format parameter from standard formats to compact formats (e.g., storing multiple input data in a single data structure). This increases productivity by reducing memory bandwidth requirements and power consumption, while the added complexity is managed through specialized hardware circuits designed to handle these compact formats natively.
Data Source
AI summary
A neural processor includes one or more neural engine circuits and a planar engine circuit. The neural engine circuits can perform convolution operations of first input data with one or more kernels to generate a first output. The planar engine circuit receives second input data that corresponds to a version of the first input data. The planar engine circuit also receives third input data that includes fourth input data and fifth input data stored together in a dimension of third input data. The planar engine circuit performs a first elementwise operation between a version of the second input data and a version of the fourth input data to generate intermediate data. The planar engine circuit performs a second elementwise operation between the intermediate data and a version of the fifth input data to generate a second output.