Plane Switch Assigns CGN Drivers to Word Lines

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Solution Overview

Problem

Current NAND flash memory systems face challenges in efficiently controlling a large number of word lines due to the increasing types of necessary voltages required for data programming and reading, leading to increased chip area and complexity.

Innovation Solution

The implementation of a 3D-stacked nonvolatile semiconductor memory device with a BiCS flash memory system that uses a plane switch to efficiently assign and control CGN drivers for adjacent word lines, reducing the number of drivers needed by using zone signals and CGU drivers for simpler voltage applications, allowing for parallel access across multiple planes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the number of CGN drivers is increased to control more word lines, then the control capability over word lines is improved, but the chip area increases

Engineering Contradiction:
Improvecontrol capability over word linesVSAvoidchip area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent implements a plane switch that enables each CGN driver to serve multiple word lines across different planes through dynamic assignment. The plane switch acts as a universal routing mechanism that allows a single CGN driver to control different word lines in different planes based on operational requirements, thereby reducing the total number of CGN drivers needed while maintaining comprehensive control capability

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The memory system is divided into multiple planes, with each plane having its own plane switch. This segmentation allows independent control of word lines in each plane while sharing CGN drivers across planes. The plane-level segmentation enables efficient resource utilization by allowing CGN drivers to be assigned to specific planes based on current operational needs

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If more types of voltages are provided for data programming and reading, then the functionality for different operations is improved, but the device complexity increases

Engineering Contradiction:
Improvefunctionality for different operationsVSAvoiddevice complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The plane switch serves as an intermediary between CGN drivers and word lines, introducing a layer of indirection that simplifies the overall control architecture. Instead of requiring direct control paths from multiple CGN drivers to multiple word lines, the plane switch mediates these connections, enabling voltage control for different operations through a standardized interface while reducing structural complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If parallel access across multiple planes is enabled, then the data access throughput is improved, but the control mechanism becomes more complex

Engineering Contradiction:
Improvedata access throughputVSAvoidcontrol mechanism complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The plane switch implements dynamic assignment of CGN drivers to word lines based on current operational requirements. This dynamic reconfiguration capability enables the system to adapt to different access patterns, supporting parallel access across multiple planes when needed while simplifying control for single-plane operations, thereby improving throughput without permanently increasing control mechanism complexity

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9799406B2Memory system
Publication Date: 2017.10.24 KIOXIA CORP
  • US9799406B2 patent drawing
  • US9799406B2 patent drawing
  • US9799406B2 patent drawing

AI summary

A memory system includes a memory device, and a controller which controls the memory device. The memory device includes a plurality of memory cells capable of rewriting data, a plurality of word lines connected to the plurality of memory cells, a page including the plurality of memory cells connected to the same word line, a plane including a plurality of pages, a memory cell array including a plurality of planes, and a plurality of word line drivers which apply voltages to the plurality of word lines, and a plurality of switches provided for each plane and which assigns the word line drivers to the word lines.