Wafer-Level Plasma Limiter for Receiver Protection

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Solution Overview

Problem

Existing plasma power limiters are separate, bulky devices that cause significant signal loss and cannot be easily integrated into sensitive electronic circuits, such as those used in receivers, due to their size and design, which makes them unsuitable for applications where space and signal integrity are critical.

Innovation Solution

A monolithically fabricated wafer-level plasma power limiter is integrated onto the same substrate as other circuits using wafer-level packaging, featuring a hermetically sealed cavity with an ionizable gas that generates a plasma discharge to divert high-intensity signals to ground, thereby protecting sensitive electronics without significant signal loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a plasma power limiter is provided at the front end of a receiver to protect against high power signals, then the reliability of sensitive electronics is improved, but the device complexity and space requirements increase

Engineering Contradiction:
Improveprotection of sensitive electronicsVSAvoidintegration into circuit
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent integrates the plasma power limiter directly into the MMIC substrate, merging the protection function with the existing circuit board structure. The bonding ring that originally served only as a hermetic seal now also functions as the ground connection for the plasma limiter, eliminating the need for separate grounding structures and reducing overall device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The bonding ring serves dual purposes: providing hermetic sealing for the MMIC package and serving as the ground electrode for the plasma power limiter. This multi-functional design reduces the number of components needed and simplifies the overall structure while maintaining effective protection against high power signals.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If a separate plasma power limiter device is used to block high power signals, then the protection function is achieved, but significant signal loss occurs before amplification

Engineering Contradiction:
Improveprotection functionVSAvoidsignal loss
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent modifies the operational parameters of the plasma limiter by integrating it at the wafer level with direct ground connection through the bonding ring. This configuration changes the electrical characteristics and threshold behavior of the plasma discharge, allowing it to activate more selectively at high power levels while maintaining better signal integrity for normal operating conditions compared to separate bulk devices.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If wafer-level packaging with bonding rings is used for MMICs, then hermetic sealing is achieved, but the integration of additional functions like plasma limiting becomes complex

Engineering Contradiction:
Improvehermetic sealingVSAvoidintegration of plasma limiter
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the hermetic sealing function and plasma limiter ground connection into a single bonding ring structure. This merging eliminates the need for separate ground paths or additional bonding structures, making the integration of the plasma limiter function straightforward while maintaining the required hermetic seal for MMIC operation.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The integrated plasma power limiter effectively protects sensitive electronics from high-intensity signals while maintaining minimal signal loss and allowing for compact, efficient integration within electronic circuits, enhancing their reliability and performance.

Implementation Method 1

a hermetically sealed cavity with an ionizable gas that generates a plasma discharge to divert high-intensity signals to ground

Methodology Applied
Scientific EffectPlasma discharge: Plasma

Implementation Method 2

ionizable gas that generates a plasma discharge

Methodology Applied
Scientific EffectIonization: Ionisation

Data Source

PatentUS9774067B2Low power threshold integrated micro-plasma limiter
Publication Date: 2017.09.26 NORTHROP GRUMMAN SYSTEMS CORP
  • US9774067B2 patent drawing
  • US9774067B2 patent drawing
  • US9774067B2 patent drawing

AI summary

A plasma power limiter fabricated using wafer-level fabrication techniques with other circuit elements. The power limiter includes a signal substrate having a first side and a second side, an input signal line formed on the first side, a signal transmission line formed on the second side and an output signal line formed on the first side. The power limiter also includes a ground substrate having a first side and a second side, and being bonded to the signal substrate to form a sealed cavity including an ionizable gas therebetween. The ground substrate includes a ground metal layer formed on the second side. A signal propagating on the input signal line at a power level greater than a threshold power level generates a voltage potential across the cavity that ionizes the gas and generates a plasma discharge, and limits power of the output signal coupled to the output signal line.