PLD Configuration Port Data Transfer for Low-Bandwidth I/O
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Programmable logic devices (PLDs) face limitations in implementing user designs due to the significant resources required for low-bandwidth peripherals, which underutilize high-speed capabilities and limit the unique logic that can be implemented.
Innovation Solution
A method for transferring communication data through programmable logic devices using a configuration port to program input/output blocks, where data is sequentially transferred between pins and input/output registers, and formatted within frames of configuration data, reducing the need for programmable logic and interconnect resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If low bandwidth peripherals are implemented using programmable logic and interconnect resources, then communication functionality is achieved, but a significant portion of programmable logic and interconnect resources is consumed
Solution Approach 1:
The configuration port is repurposed to serve dual functions: its original function of programming the PLD and an additional function of transferring communication data. By making the configuration port multi-functional, the patent eliminates the need for dedicated logic and interconnect resources for low-bandwidth communication, thereby resolving the contradiction between achieving communication functionality and consuming programmable resources.
2Adaptability or versatility
If low bandwidth peripherals are implemented in programmable logic and interconnect resources, then communication is enabled, but the high speed capabilities of the programmable logic and interconnection resources are underutilized
Solution Approach 1:
The configuration port, capable of high-speed data transfer for programming purposes, is utilized for communication data transfer as well. This allows the high-speed capabilities of the PLD to be leveraged for communication functions, eliminating the underutilization problem while maintaining communication capability.
3Adaptability or versatility
If a significant portion of programmable logic and interconnect resources is required to implement low bandwidth peripherals, then communication functionality is provided, but the amount of unique logic of a user design that can be implemented is limited
Solution Approach 1:
By enabling the configuration port to handle both programming and communication data transfer, the patent frees up programmable logic and interconnect resources that would otherwise be dedicated to communication peripherals. This increases the available resources for implementing unique user design logic, resolving the contradiction between providing communication functionality and maintaining resources for custom logic.
Data Source
AI summary
Various embodiments of the invention provide a method for transferring communication data through one or more pins of a programmable logic device (PLD). The PLD includes a configuration port that may be used to program programmable logic and interconnect resources of the PLD. The programmable logic and interconnect resources include the input/output blocks of the PLD. Portions of the communication data are sequentially transferring between certain pins of the PLD and certain input/output registers in one or more input/output blocks associated with the pins. A frame of configuration data including a portion of the communication data is transferred between the input/output registers and a frame register of the configuration port of the PLD. Formats are converted between the portion of the communication data and the frame of the configuration data in the frame register of the PLD.