Programmable Logic Device Integrating Framer Mapper and Processor

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Solution Overview

Problem

Conventional programmable logic devices in telecommunications systems face challenges with signal integrity and flexibility at high data rates, requiring separate framer, mapper, and host processor components that increase complexity, space usage, and susceptibility to interference.

Innovation Solution

Integration of a framer, mapper, and host processor into a single programmable logic device using either a soft processor or embedded processor, reducing the load on the host processor and enabling distributed processing on a single chip.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If separate framer, mapper, and host processor components are used, then control functionality is provided, but device complexity and board space increase

Engineering Contradiction:

Improvecontrol functionalityVSAvoidnumber of separate components

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent combines the host processor, framer, and mapper into a single integrated device. The processor is coupled to control both the framer and mapper components, eliminating the need for separate host processors and reducing system complexity while maintaining full control functionality.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The integrated device performs multiple functions including processing, framing, and mapping operations within a single unit. The processor can execute different applications and protocols, providing universal control capability for various telecommunication functions.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If separate framer, mapper, and host processor components are used, then control functionality is provided, but board space consumption increases

Engineering Contradiction:

Improvecontrol functionalityVSAvoidboard space

Core Design Contradiction:

Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent consolidates multiple discrete components (host processor, framer, mapper) into a single integrated device, thereby reducing the total board space required while maintaining all necessary control functionalities.

Inventive Principle:

Principle #5Merging (Combining)

3Ease of operation

If multiple separate components and buses are used, then control and data transfer are enabled, but electromagnetic interference and noise increase

Engineering Contradiction:

Improvecontrol and data transferVSAvoidelectromagnetic interference

Core Design Contradiction:

Ease of operationVSObject-generated harmful factors

Solution Approach 1:

The patent integrates multiple components into a single device with internal coupling, eliminating the need for external buses and interconnections. This reduces electromagnetic interference and noise while maintaining full control and data transfer capabilities through internal signal paths.

Inventive Principle:

Principle #5Merging (Combining)

4Ease of operation

If external buses and interconnections are used, then component communication is enabled, but susceptibility to electromagnetic compatibility issues increases

Engineering Contradiction:

Improvecomponent communicationVSAvoidelectromagnetic compatibility compliance

Core Design Contradiction:

Ease of operationVSReliability

Solution Approach 1:

The patent combines multiple components into a single integrated device, eliminating external buses and interconnections that are susceptible to electromagnetic interference. This improves reliability and reduces susceptibility to electromagnetic compatibility issues while maintaining full communication capability through internal coupling.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS8180919B1Integrated circuit and method of employing a processor in an integrated circuit

Publication Date: 2012.05.15 XILINX INC

AI summary

According to various embodiments of the present invention, an intelligent framer/mapper integrates the framer, mapper, and the controlling function of the host processor, implemented as either a soft processor or an embedded processor, into a single device, such as a programmable logic device. The use of the soft processor or embedded processors on the device reduces the load on the host processor on the line card. According to some aspects of the invention, the devices takes advantage of an embedded, dedicated processor and/or soft processor(s) to allow for a distributed processing on a single chip.