PLD Configuration Memory Redundancy for Defective Cell Repair

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Solution Overview

Problem

Conventional programmable logic devices (PLDs) face significant yield loss due to defective configuration memory cells, and existing solutions to address this issue, such as providing redundant components, increase overhead and reduce performance.

Innovation Solution

Incorporating spare memory cells that store configuration data to support defective configuration memory cells, ensuring proper data values are maintained by providing configuration data from spare cells to defective ones.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If redundant portions (logic blocks, interconnect, configuration memory) are provided to replace defective portions, then reliability is improved, but device complexity and die area increase significantly

Engineering Contradiction:

ImproveyieldVSAvoidoverhead

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The configuration memory is segmented into functional blocks, each with its own dedicated spare cells. This allows localized repair of defective segments without requiring global redundancy, reducing overall device complexity while maintaining yield.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces a third dimension to the conventional memory cell by adding a repair mode capability. The same physical memory cell can operate in normal mode or repair mode, effectively creating redundancy without additional die area by utilizing the time/operational mode dimension.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Reliability

If redundant portions are provided to replace defective portions, then reliability is improved, but PLD performance is reduced

Engineering Contradiction:

ImproveyieldVSAvoidperformance

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The memory cell array dynamically switches between normal operation mode and repair mode based on detected defects. During normal operation, all memory cells are active for maximum performance. When a defect is detected, only the specific defective cells are switched to repair mode, maintaining overall system performance while ensuring reliability.

Inventive Principle:

Principle #15Dynamics

3Reliability

If all configuration memory cells must operate properly, then PLD functionality is ensured, but yield loss increases due to defective cells

Engineering Contradiction:

ImprovefunctionalityVSAvoidyield

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

Spare memory cells are pre-positioned within each functional block as a cushion against potential defects. These spare cells remain dormant during normal operation but are immediately activated when defects are detected, ensuring functionality is maintained without sacrificing yield.

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS7598765B2Redundant configuration memory systems and methods

Publication Date: 2009.10.06 LATTICE SEMICON CORP

AI summary

Systems and methods are disclosed directed to techniques with respect to defective configuration memory cells. For example, in accordance with an embodiment of the present invention, a programmable logic device includes a plurality of configuration memory cells; and at least one spare memory cell, wherein the at least one spare memory cell is adapted to store configuration data to provide to at least one defective configuration memory cell.