Programmable Logic Memory Controller for External Memory Transfer

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Solution Overview

Problem

Existing memory controller solutions for programmable logic devices (PLDs) are not entirely satisfactory in facilitating efficient data transfer between the PLD and external memory devices, particularly in terms of control and status signal management.

Innovation Solution

Incorporating a dedicated memory controller circuit within the programmable circuitry of the PLD before field programming, which includes a control portion, an interface portion, and a data storage portion, enabling efficient data transfer and management of commands, control, and data signals between the PLD fabric and external memory devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a memory controller is provided as a standalone device external to the PLD, then the PLD can interface with external memory devices, but the device complexity increases and data transfer efficiency is reduced

Engineering Contradiction:
Improvedata transfer efficiencyVSAvoidsystem complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges the memory controller functionality directly into the PLD device by incorporating a dedicated memory controller circuit within the PLD fabric. This integration eliminates the need for external standalone memory controllers, thereby reducing system complexity while improving data transfer efficiency through direct interfacing capabilities.

Inventive Principle:
Principle #5Merging (Combining)

2Device complexity

If a memory controller is created within the PLD from general purpose circuit components through field programming, then the device complexity is reduced, but the reliability and performance are insufficient

Engineering Contradiction:
Improvedevice structureVSAvoidcontrol signal management
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent segments the PLD architecture by providing a dedicated memory controller circuit as a distinct functional unit within the PLD fabric. This dedicated circuitry is specifically designed for memory control operations, ensuring reliable management of control and status signals while maintaining integration within the PLD device.

Inventive Principle:
Principle #1Segmentation

3Adaptability or versatility

If general purpose circuit components are used to create a memory controller through field programming, then the adaptability is high, but the control and status signal management is inefficient

Engineering Contradiction:
Improveprogramming flexibilityVSAvoidsignal management efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent combines dynamic programmability with dedicated hardware by providing a memory controller circuit that can be configured through field programming while maintaining specialized control logic. This allows the controller to adapt to different memory device types and configurations while ensuring efficient control and status signal management through purpose-built circuitry.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP2384545B1Method and apparatus for memory control with a programmable device
Publication Date: 2016.01.27 XILINX INC
  • EP2384545B1 patent drawingFigure 1
  • EP2384545B1 patent drawingFigure 2
  • EP2384545B1 patent drawingFigure 3

AI summary

A technique is provided for memory control in a device (225) having programmable circuitry (230), including providing a dedicated memory controller circuit (290) in the device before the programmable circuitry is field programmed. Another technique involves fabricating a device (225), where the fabricating involves forming programmable circuitry (230) that includes a dedicated memory controller circuit (290) before the circuitry is field programmed.