Programmable Logic Device Serial Peripheral Interface Configuration
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Solution Overview
Problem
Conventional programmable logic devices (PLDs) face limitations due to the need for large numbers of I/O pins for manufacturer-specific programming interfaces, which reduces user-defined I/O pins and lacks convenient ways to selectively boot from various configuration data sources, such as internal non-volatile memory or external devices.
Innovation Solution
Incorporating volatile memory to store configuration data, non-volatile memory for data transfer, and a serial peripheral interface (SPI) port to receive configuration data from external devices, allowing for efficient configuration and reconfiguration of PLDs with reduced pin usage and enhanced interfacing capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If manufacturer-specific programming interfaces are used to program PLDs with configuration data, then configuration capability is provided, but the number of available I/O pins for user-defined operation is significantly reduced
Solution Approach 1:
The patent applies universality by implementing a standard SPI programming interface that can be used for multiple purposes: programming configuration data, reading back configuration data, and interfacing with various external devices. This single multi-functional interface replaces the need for dedicated manufacturer-specific programming pins, allowing the same pins to serve both programming and user-defined I/O functions.
Solution Approach 2:
The patent introduces an intermediary SPI interface layer between the PLD and external programming devices. This standard SPI interface acts as a mediator that enables configuration data transfer using a well-defined protocol, eliminating the need for direct custom wiring and dedicated programming pins while maintaining full configuration capability.
2Ease of manufacture
If dedicated I/O pins are allocated for programming interfaces, then configuration data transfer is enabled, but the pin count available for user-defined functionality is reduced
Solution Approach 1:
The SPI interface pins are designed to serve dual purposes: they function as programming interface pins during configuration and as user-defined I/O pins during normal operation. This multi-functionality ensures that the same physical pins support both configuration data transfer and user applications, maximizing pin utilization.
Solution Approach 2:
The patent implements dynamic pin assignment where the function of pins changes based on operational mode. During programming mode, the SPI pins are configured for data transfer; during normal operation, these same pins can be reconfigured for user-defined functions. This dynamic reassignment allows the system to adapt pin functionality based on current needs.
Data Source
AI summary
Systems and methods are disclosed herein to provide an improved approach to the configuration of integrated circuits such as programmable logic devices (PLDs). For example, in accordance with one embodiment of the present invention, a PLD includes volatile memory adapted to store configuration data to configure the PLD for its intended function. The PLD further includes non-volatile memory adapted to store configuration data which is transferable to the volatile memory to configure the PLD for its intended function. The PLD further includes a serial peripheral interface (SPI) port adapted to receive configuration data from an external device for transfer into one of the volatile memory and the non-volatile memory.