Programmable PLL Clock Distribution for Multi-Standard Serial Interfaces
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Solution Overview
Problem
The challenge lies in providing programmable logic devices (PLDs) with high-speed serial interface (HSSI) circuitry that can efficiently support multiple, often non-standard, high-speed serial communication standards and protocols without increasing manufacturing costs or complexity, as including numerous HSSI circuits is wasteful and uneconomical, and manufacturing multiple versions of PLD circuitry is also uneconomical.
Innovation Solution
The implementation of a four-channel high-speed serial interface module with programmable physical medium attachment (PMA) and physical coding sub-layer (PCS) channel circuits, along with a phase-locked loop (PLL) circuit, arranged in a linear layout, allowing for configuration as either a data-channel or clock-multiplier-unit, which enhances resource utilization and area efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a large number of different HSSI circuits are included on a PLD to support multiple high-speed serial communication standards, then the adaptability to support various protocols is improved, but the device complexity and manufacturing cost increase significantly
Solution Approach 1:
The patent implements a universal HSSI circuit architecture where a single set of circuitry can be programmed to support multiple high-speed serial communication standards including SONET/SDH, Fibre Channel, and InfiniBand. The PLD contains reconfigurable logic elements and programmable interfaces that can be configured through software to match different protocol requirements, eliminating the need for separate dedicated circuits for each standard.
Solution Approach 2:
The HSSI circuit implementation uses dynamically reconfigurable logic blocks that can change their functional behavior based on the required protocol. The circuit architecture includes programmable interconnect structures and configurable functional units that can be reprogrammed in the field to adapt to different communication standards, providing dynamic adaptability without hardware changes.
2Adaptability or versatility
If multiple versions of PLD circuitry are manufactured with different HSSI circuitry for different standards, then the adaptability to specific protocols is improved, but the manufacturing economy and productivity deteriorate due to loss of scale benefits
Solution Approach 1:
The patent employs a universal PLD circuit design that can be manufactured in large volumes as a single product. The programmable architecture allows this single manufactured version to be configured for different protocols through software programming rather than hardware variations, maintaining manufacturing scale benefits while providing protocol-specific functionality.
Solution Approach 2:
The implementation uses programmable parameters and configuration data to adjust the behavior of the HSSI circuits for different standards. Instead of manufacturing different hardware versions, the system changes operational parameters through programming, allowing a single manufacturing process to produce devices that can be customized for various protocols.
3Adaptability or versatility
If numerous HSSI circuits are included on a PLD to support various protocols, then the adaptability is improved, but the area efficiency and die cost increase
Solution Approach 1:
The patent merges multiple protocol-specific circuit functions into a single integrated programmable HSSI block. By combining the functionality of what would traditionally require separate circuits for SONET, Fibre Channel, and InfiniBand into one unified programmable structure, the implementation achieves protocol support with minimal chip area usage.
Solution Approach 2:
A universal programmable interface circuit is designed to handle multiple protocols within a compact footprint. The reconfigurable logic elements and shared resources allow the same physical circuit to perform different protocol functions, maximizing area efficiency while maintaining adaptability across multiple standards.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient support for various HSSI standards and protocols, improving resource utilization and area efficiency, thereby reducing die costs and enhancing fitting in wire-line and computing applications.
Implementation Method 1
at least one phase-locked loop (PLL) circuit which is programmably coupled to each of the four PMA channel circuits
Data Source
AI summary
One embodiment relates to an integrated circuit having a plurality of four-channel serial interface modules. Each of the plurality of four-channel serial interface modules includes a first physical medium attachment (PMA) channel circuit, a second PMA channel circuit adjacent to the first PMA channel circuit, a third PMA channel circuit adjacent to the second PMA channel circuit, a fourth PMA channel circuit adjacent to the third PMA channel circuit, and at least one phase-locked loop (PLL) circuit which is programmably coupled to each of the first, second, third and fourth PMA channel circuits. Other embodiments and features are also disclosed.