PLL Modulation Circuit Digital Gain Calibration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Two-point modulation techniques in telecommunications face challenges due to increased power consumption and signal distortion caused by gain mismatching, which requires a simple, low-power, and low-cost modulation circuit with self-calibration capabilities.
Innovation Solution
A modulation circuit comprising a phase-locked loop (PLL) circuit, a scalar circuit, and a sigma-delta modulator, where the scalar circuit generates a digital control signal to control frequency deviation, and the sigma-delta modulator adjusts the divider value of the PLL, eliminating the need for a digital-to-analog converter and enabling gain calibration to mitigate mismatching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a two-point modulator uses a DAC to convert modulating data into analog form for VCO input, then the modulation accuracy is improved, but the power consumption increases
Solution Approach 1:
The patent extracts and removes the DAC component from the modulation system. Instead of converting modulating data to analog form through a DAC, the system directly uses digital modulating data to control the frequency divider ratio in the PLL, thereby eliminating the power consumption associated with DAC operation while maintaining modulation functionality.
Solution Approach 2:
The patent substitutes the analog conversion mechanism (DAC) with a direct digital control mechanism. The digital modulating data is used to programmatically control the frequency divider ratio through calibration, replacing the need for analog signal generation and eliminating the associated power consumption of analog conversion circuits.
2Speed
If a two-point modulator uses separate modulation paths for VCO and SDM, then the bandwidth limitation issue is resolved, but gain mismatching between paths causes signal distortion
Solution Approach 1:
The patent implements a feedback-based calibration mechanism where the system measures the actual frequency deviation produced by digital control signals and adjusts the frequency divider ratio accordingly. This closed-loop calibration process compensates for gain mismatches between modulation paths, ensuring accurate modulation without requiring precise manual matching of analog components.
Solution Approach 2:
The system performs self-calibration automatically during operation or initialization. The modulation circuit contains built-in calibration logic that measures its own performance characteristics and adjusts internal parameters (frequency divider ratio) to optimize accuracy, eliminating the need for external calibration equipment or manual adjustment of gain-matched components.
3Adaptability or versatility
If a two-point modulator uses DAC and additional circuits at VCO input, then the modulation flexibility is improved, but the device complexity and cost increase
Solution Approach 1:
The patent makes the frequency divider unit serve multiple functions: it acts as both the frequency division element in the PLL and as a programmable modulation actuator. By controlling the divider ratio with digital signals, the same circuit component performs both frequency synthesis and frequency modulation, eliminating the need for separate DAC and modulation circuitry.
Solution Approach 2:
The patent merges the modulation function with the frequency division function. Instead of having separate modulation circuits that convert digital data to analog signals, the system combines digital data control directly with the frequency divider ratio selection, merging two previously separate functional blocks into a unified digital control mechanism.
Data Source
AI summary
A modulation circuit includes a phase locked loop (PLL) circuit, a scalar circuit and a sigma-delta modulator. The PLL circuit is for generating an output oscillating signal in response to a reference signal, a first control signal and a second control signal. The scalar circuit is for generating the first control signal in response to modulating data to control frequency deviation of the output oscillating signal, wherein the first control signal is in a digital form. The sigma-delta modulator is for generating the second control signal according to the modulating data to modulate a divider value of a frequency divider of the PLL circuit.