Memory Module PMIC Voltage Alignment Reduces DC Currents
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Solution Overview
Problem
Semiconductor memory modules face issues with power consumption and reliability due to unintended direct-current (DC) currents flowing between memory devices and controllers, caused by voltage differences between host and memory voltages, leading to increased power consumption and stress on the modules.
Innovation Solution
A semiconductor memory module with a power management integrated circuit (PMIC) that detects voltage differences between host and memory voltages and adjusts the memory voltage to minimize these differences, using a comparator and register to calibrate the voltage levels, thereby reducing power consumption and improving reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If voltage differences between host and memory voltages are present, then power management functions can be performed, but unintended DC currents flow causing increased power consumption and reliability issues
Solution Approach 1:
The PMIC includes a voltage detection mechanism that continuously monitors the voltage difference between host and memory voltages. When a voltage difference is detected, the system activates adjustment circuits to equalize the voltages, preventing unintended DC currents from flowing between the host and memory devices. This feedback-based approach ensures voltage alignment while maintaining power management functionality.
2Loss of energy
If voltage alignment between host and memory is maintained, then unintended DC currents are eliminated, but voltage adjustment mechanisms add device complexity
Solution Approach 1:
The PMIC merges multiple functions including voltage detection, voltage adjustment, and power management into a single integrated circuit. By combining these functions in one chip, the design avoids the complexity of separate voltage alignment circuits and multiple discrete components. The integrated structure achieves voltage alignment while minimizing the overall device complexity.
3Reliability
If voltage adjustment is performed continuously, then voltage alignment is maintained improving reliability, but power consumption increases
Solution Approach 1:
The PMIC performs voltage adjustment periodically rather than continuously. The system monitors voltage differences and activates adjustment circuits only when voltage alignment deviates from the optimal range. This periodic adjustment maintains voltage stability and prevents unintended DC currents while minimizing the power consumption associated with continuous voltage regulation.
Data Source
AI summary
A semiconductor memory module includes a memory printed circuit board (PCB) that includes first connectors, a second connector, and a third connector configured to be connectable with an external device, memory devices that are mounted on the memory PCB and are connected with the first connectors, and a power management integrated circuit that is mounted on the memory PCB, receives a first voltage through the second connector, generates a second voltage from the first voltage, and supplies the second voltage to the memory devices. The power management integrated circuit adjusts the second voltage depending on a difference between a signal received through the third connector and the second voltage.


