PMOS eFuse Power Circuit for Low-Leakage Read Accuracy
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Solution Overview
Problem
Existing electronic fuse circuits in semiconductor memory devices face challenges in reducing transistor leakage and ensuring reading accuracy, particularly in designs that aim to save device area.
Innovation Solution
The proposed solution involves a power circuit with a shared one-transistor (1T) design for electronic fuse units, which includes a PMOS pass transistor, a buffer circuit, and a bulk voltage control circuit. This configuration reduces transistor leakage and ensures accurate reading by controlling the bulk voltage and activating a last-stage buffer during reading operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a shared one-transistor (1T) design is adopted for electronic fuse units, then device area is saved, but transistor leakage increases and reading accuracy deteriorates
Solution Approach 1:
The patent divides the control of the shared transistor into separate operational phases (programming operation and reading operation) with dedicated control circuits for each phase. The programming control circuit and reading control circuit independently control the transistor during their respective operations, preventing interference and leakage issues while maintaining the area-saving 1T design.
Solution Approach 2:
The patent applies preliminary actions by preparing the transistor and control circuits in advance for their specific operations. Before programming, the programming control circuit prepares the transistor for high-voltage operation; before reading, the reading control circuit configures the transistor for low-leakage operation. This preliminary configuration ensures optimal performance for each operation type while using the same physical transistor.
2Area of stationary object
If a shared one-transistor (1T) design is adopted for electronic fuse units, then device area is saved, but transistor leakage increases
Solution Approach 1:
The patent makes the transistor's operational state dynamic by implementing different control modes for programming and reading operations. During programming, the transistor is activated to handle high voltage; during reading, the transistor is configured to minimize leakage. This dynamic state switching allows the same transistor to serve dual purposes while minimizing energy loss in each operational mode.
Solution Approach 2:
The patent changes the electrical parameters (voltage levels, control signals) applied to the transistor depending on the operation type. For programming, higher voltages are applied to melt the fuse; for reading, lower voltages are used to detect the fuse state with minimal leakage. This parameter adaptation allows the 1T design to achieve both area savings and low leakage performance.
Data Source
AI summary
A power circuit is adapted for providing a programming voltage to an electronic fuse circuit, and includes a pass transistor of a P-type metal-oxide-semiconductor transistor, a buffer circuit, and a bulk voltage control circuit. The pass transistor includes a bulk electrode, a gate electrode, a first source/drain electrode receiving a system high voltage, and a second source/drain electrode connected to a bit line. The buffer circuit provides a control voltage to the gate electrode of the pass transistor. The pass transistor is turned on during a programming operation and turned off during a reading operation. The bulk voltage control circuit independently provides a bulk voltage to the bulk electrode. A last-stage buffer of the buffer circuit is also activated by the bulk voltage to control the pass transistor during the reading operation of the electronic fuse circuit. A method for providing power to an electronic fuse circuit is also provided.