2-Phase PMOS Shift Register for Low-Power OLED Scan Driving
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Solution Overview
Problem
Conventional shift register circuits for organic electroluminescent displays require a large number of thin-film transistors, leading to high power consumption and difficulty in mounting on large-sized panels, while also facing challenges in reducing production costs and improving yield.
Innovation Solution
A 2-phase shift register circuit utilizing a plurality of PMOS transistors and capacitors, where odd and even stages receive inverted and non-inverted clock signals respectively, allowing for sequential signal output with reduced power consumption and improved production efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a conventional shift register including PMOS and NMOS transistors is used, then signal output function is achieved, but power consumption increases due to static current flow
Solution Approach 1:
The patent changes the operational parameters of the shift register by using only PMOS transistors instead of the conventional PMOS-NMOS combination. This parameter change eliminates the static current flow path that exists in conventional designs, thereby reducing power consumption while maintaining circuit functionality through careful design of the PMOS transistor network and capacitor configuration
Solution Approach 2:
The patent extracts and removes the NMOS transistors from the conventional PMOS-NMOS shift register structure. By taking out the NMOS component entirely and redesigning the circuit to function with PMOS transistors only, the patent eliminates the source of static current consumption while preserving the essential signal output function
2Ease of manufacture
If the number of TFTs is decreased to reduce production cost, then manufacturing cost is reduced, but circuit reliability may deteriorate
Solution Approach 1:
The patent changes the transistor type parameter from a PMOS-NMOS combination to a PMOS-only configuration. This parameter change simplifies the manufacturing process by requiring only a single transistor type, thereby reducing production cost and improving yield, while the carefully designed PMOS network maintains sufficient circuit reliability for display applications
3Adaptability or versatility
If a conventional shift register with PMOS and NMOS transistors is mounted on large-sized panels, then scan driver function is achieved, but mounting difficulty increases
Solution Approach 1:
The patent changes the transistor composition parameter to use only PMOS transistors, which simplifies the manufacturing process for large-sized panels. This parameter change makes the shift register more adaptable to large panel applications by reducing the complexity of transistor fabrication and integration, thereby improving mounting ease while maintaining scan driver functionality
Data Source
Figure 1
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Figure 4A~4B
AI summary
A shift register circuit comprising a plurality of stages dependently connected to an initial input signal or an output signal of a previous stage and connected to first and second clock signals which are mutually inverted. Each stage includes eight switching devices interconnected together with three capacitors and interfaced through eleven interface points. Some of the interface points are connected to the first and second clock signals according to whether the stage is an even numbered stage or an odd numbered stage. Other ones of the interface points are connectable to the first and second clock signals in alternative ways to reduce power consumption without changing an internal configuration of the stage.